Advanced microprocessors require several (eight or more) levels of wiring to carry signal and power from transistor to transistor and to the outside world. Each wiring level must make connection to the levels above and below it through via/contact layers. The dual damascene approach to fabricating these interconnected structures creates a wiring level and a via level simultaneously, thereby reducing the total number of processing steps. However, the dual damascene strategy (of which there are several variations) still requires around twenty process steps per wiring layer. In this work, an approach to damascene processing that is based on step-and-flash imprint lithography (SFIL) is discussed. This imprint damascene process requires fewer than half as many steps as the standard photolithographic dual damascene approach. By using an imprint template with two levels of patterning, a single imprint lithography step can replace two photolithography steps. Further efficiencies are possible if the imprint resist material is itself a functional dielectric material. This work is a demonstration of the compatibility of imprint lithography (specifically SFIL) with back-end-of-line processing using a dual damascene approach with functional materials.
Step and flash imprint lithography (SFIL) has made tremendous progress since its initial development at The University of Texas at Austin in the late 1990s. The SFIL process went from laboratory to commercialization in under five years, and the number of technical hurdles that must be cleared before it is recognized as fully competitive with optical or EUV lithography for sub-50-nm patterning is dwindling. Patterning resolution has been demonstrated down to 20 nm, with the limit so far being only the template fabrication process. The SFIL method was developed from the beginning with the precision overlay/alignment requirements of multilevel device fabrication in mind. It was recognized that it would be inherently easier to achieve overlay and alignment accuracy with a constant temperature and low pressure imprinting process, and already tool designers have built on SFIL's advantages to produce tools that are viable for multilayer device fabrication. Early tools have demonstrated better than 10-nm alignment resolution, and no insurmountable fundamental issues have been identified that would prevent alignment resolution from reaching the tight tolerances required for integrated circuit manufacturing. With any contact printing method, process-generated defects are a concern, but the SFIL process has proven to be surprisingly robust with an inherent self-cleaning mechanism for removing particle contamination. Furthermore, new template surface treatments have been developed that improve mold lifetime and minimize defect generation. SFIL shows promise as a low cost manufacturing tool for a wide variety of semiconductor, microelectromechanical, optoelectronic, microfluidic, and other devices. This work summarizes the state of development of step and flash imprint lithography and discusses its potential as a general nanofabrication tool.
KEYWORDS: Etching, Polymerization, Molecules, Monte Carlo methods, Finite element methods, Lithography, Ultraviolet radiation, Molecular interactions, Scanning electron microscopy, Optical lithography
Step and Flash Imprint Lithography (SFIL) is a revolutionary next generation lithography option that has become increasingly attractive in recent years. Elimination of the costly optics of current step and scan imaging tools makes SFIL a serious candidate for large-scale commercial patterning of critical dimensions below ~50 nm. This work focuses on the kinetics of the UV curing of the liquid etch barrier and the resulting densification/contraction of the etch barrier as it solidifies during this step. Previous experimental work in our group has measured the bulk densification of several etch barrier formulations, typically about 9 % (v/v). It remains unknown, however, how much etch barrier contraction occurs during the formation of nano-scale features. Furthermore, it is of interest to examine how changes in monomer pendant group size impact imprinted feature profiles.
This work provides answers to these questions through a combination of modeling and experimental efforts. Densification due to the photopolymerization reaction and the resulting shift from Van der Waals’ to covalent interactions is modeled using Monte-Carlo techniques. The model allows for determination of extent of reaction, degree of polymerization, and local density changes as a function of the etch barrier formulation and the interaction energies between molecules (including the quartz template). Experimental efforts focus on a new technique to examine trench profiles in the quartz template using TEM characterization. Additionally, SEM images of imprinted images from various etch barrier formulations were examined to determine local contraction of the etch barrier. Over a large range of etch barrier formulations, which range from 10 - 20 % volumetric contraction as bulk materials, it was found that dense 100 nm lines printed approximately the same size and shape.
Recent work on Step and Flash Imprint Lithography (SFIL) has been focused on process and materials fundamentals and demonstration of resolution capability. Etch transfer rpocesses have been developed that are capable of transferring imprinted images though 150 nm of residual etch barrier, yielding sub 50 nm lines with aspect ratios greater than 8:1. A model has been developed for the photoinitiated, free radical curing of the acrylate etch barrier materials that have been used in the SFIL process. This model includes the effects of oxygen transport on the kinetics of the reaction and yields a deeper understanding of the importance of oxygen inhibition, and the resulting impact of that process on throughput and defect generation. This understanding has motivated investigation of etch barrier materials such as vinyl ethers that are cured by a cationic mechanism, which does not exhibit these same effects. Initial work on statistical defect analysis has is reported and it does not reveal pathological trends.
The escalating cost for Next Generation Lithography (NGL) tools is driven in part by the need for complex sources and optics. The cost for a single NGL tool could exceed $50M in the next few years, a prohibitive number for many companies. As a result, several researchers are looking at low cost alternative methods for printing sub-100 nm features. In the mid-1990s, several resarech groups started investigating different methods for imprinting small features. Many of these methods, although very effective at printing small features across an entire wafer, are limited in their ability to do precise overlay. In 1999, Willson and Sreenivasan discovered that imprinting could be done at low pressures and at room temperatures by using low viscosity UV curable monomers. The technology is typically referred to as Step and Flash Imprint Lithography. The use of a quartz template enabled the photocuring process to occur and also opened up the potential for optical alignment of teh wafer and template. This paper traces the development of nanoimprint lithography and addresses the issues that must be solved if this type of technology is to be applied to high-density silicon integrated circuitry.
Step and flash imprint lithography (SFIL) is an attractive method for printing sub-100 nm geometries. Relative to other imprinting processes SFIL has the advantage that the template is transparent, thereby facilitating conventional overlay techniques. In addition, the imprint process is performed at low pressures and room temperature, minimizing magnification and distortion errors. The purpose of this work was to investigate alternative methods for defining high resolution SFIL templates and study the limits of the SFIL process. Two methods for fabricating templates were considered. The first method used a very thin (<20 nm) layer of Cr as a hard mask. The second fabrication scheme attempts to address some of the weaknesses associated with a solid glass substrate. Because there is no conductive layer on the final template, scanning electron microscopy (SEM) and defect inspection are compromised. By incorporating a conductive and transparent layer of indium tin oxide on the glass substrate, charging is suppressed during SEM inspection, and the transparent nature of the final template is not affected. Using ZEP-520 as the electron beam imaging resist, features as small as 20 nm were resolved on the templates. Features were also successfully imprinted using both types of templates.
Step and Flash Imprint Lithography (SFIL) is an attractive method for printing sub-100 nm geometries. Relative to other imprinting processes SFIL has the advantage that the template is transparent, thereby facilitating conventional overlay techniques. The purpose of this work is to investigate alternative methods for defining features on an SFIL template. The first method used a much thinner (< 20 nm) layer of Cr as a hard mask. Thinner layers still suppress charging during e-beam exposure of the template, and have the advantage that CD losses encountered during the pattern transfer of the Cr are minimized. The second fabrication scheme addresses some of the weaknesses associated with a solid glass substrate. Because there is no conductive layer on the final template, SEM and defect inspection are compromised. By incorporating a conductive and transparent layer of indium tin oxide on the glass substrate, charging is suppressed during inspection, and the UV characteristics of the final template are not affected. Templates have been fabricated using the two methods described above. Features as small as 30 nm have been resolved on the templates. Sub-80 nm features were resolved on the first test wafer printed.
Step and Flash Imprint Lithography (SFIL) is an attractive method for printing sub-100 nm geometries. Relative to other imprinting processes SFIL has the advantage that the template is transparent, thereby facilitating conventional overlay techniques. In addition, the imprint process is performed at low pressures and room temperature, minimizing magnification and distortion errors. The purpose of this work was to investigate alternative methods for defining high resolution SFIL templates and study the limits of the SFIL process. Two methods for fabricating templates were considered. The first method used a very thin layer of Cr as a hard mask. The second fabrication scheme attempts to address some of the weaknesses associated with a solid glass substrate. Because there is no conductive layer on the final template, SEM and defect inspection are compromised. By incorporating a conductive and transparent layer of indium tin oxide (ITO) on the glass substrate, charging is suppressed during SEM inspection, and the transparent nature of the final template is not affected. Using ZEP-520 as the electron beam imaging resist, features as small as 20 nm were resolved on the templates. Features were also successfully imprinted using both types of templates.
An alternative approach to lithography is being developed based on a dual-layer imprint scheme. This process has the potential to become a high-throughput means of producing high aspect ratio, high-resolution patterns without projection optics. In this process, a template is created on a standard mask blank by using the patterned chromium as an etch mask to produce high-resolution relief images in the quartz. The etched template and a substrate that has been coated with an organic planarization layer are brought into close proximity. A low-viscosity, photopolymerizable formulation containing organosilicon precursors is introduced into the gap between the two surfaces. The template is then brought into contact with the substrate. The solution that is trapped in the relief structures of the template is photopolymerized by exposure through the backside of the quartz template. The template is separated from the substrate, leaving a UV-curved replica of the relief structure on the planarization layer. Features smaller than 60 nm in size have been reliably produced using this imprinting process. The resolution silicon polymer images are transferred through the planarization layer by anisotropic oxygen reactive ion etching. This paper provides a progress report on our efforts to evaluate the potential of this process.
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