Padraig Timoney, Taher Kagalwala, Edward Reis, Houssam Lazkani, Jonathan Hurley, Haibo Liu, Charles Kang, Paul Isbester, Naren Yellai, Michael Shifrin, Yoav Etzioni
KEYWORDS: Machine learning, Metrology, Metals, Copper, Back end of line, Semiconducting wafers, High volume manufacturing, Process control, Critical dimension metrology, Front end of line
In recent years, the combination of device scaling, complex 3D device architecture and tightening process tolerances have strained the capabilities of optical metrology tools to meet process needs. Two main categories of approaches have been taken to address the evolving process needs. In the first category, new hardware configurations are developed to provide more spectral sensitivity. Most of this category of work will enable next generation optical metrology tools to try to maintain pace with next generation process needs. In the second category, new innovative algorithms have been pursued to increase the value of the existing measurement signal. These algorithms aim to boost sensitivity to the measurement parameter of interest, while reducing the impact of other factors that contribute to signal variability but are not influenced by the process of interest. This paper will evaluate the suitability of machine learning to address high volume manufacturing metrology requirements in both front end of line (FEOL) and back end of line (BEOL) sectors from advanced technology nodes. In the FEOL sector, initial feasibility has been demonstrated to predict the fin CD values from an inline measurement using machine learning. In this study, OCD spectra were acquired after an etch process that occurs earlier in the process flow than where the inline CD is measured. The fin hard mask etch process is known to impact the downstream inline CD value. Figure 1 shows the correlation of predicted CD vs downstream inline CD measurement obtained after the training of the machine learning algorithm. For BEOL, machine learning is shown to provide an additional source of information in prediction of electrical resistance from structures that are not compatible for direct copper height measurement. Figure 2 compares the trench height correlation to electrical resistance (Rs) and the correlation of predicted Rs to the e-test Rs value for a far back end of line (FBEOL) metallization level across 3 products. In the case of product C, it is found that the predicted Rs correlation to the e-test value is significantly improved utilizing spectra acquired at the e-test structure. This paper will explore the considerations required to enable use of machine learning derived metrology output to enable improved process monitoring and control. Further results from the FEOL and BEOL sectors will be presented, together with further discussion on future proliferation of machine learning based metrology solutions in high volume manufacturing.
KEYWORDS: Scatterometry, Back end of line, Metrology, 3D metrology, 3D modeling, Dielectrics, Copper, Process control, Etching, Semiconducting wafers, Photomasks
Scaling of interconnect design rules in advanced nodes has been accompanied by a reducing metrology budget for BEOL process control. Traditional inline optical metrology measurements of BEOL processes rely on 1-dimensional (1D) film pads to characterize film thickness. Such pads are designed on the assumption that solid copper blocks from previous metallization layers prevent any light from penetrating through the copper, thus simplifying the effective film stack for the 1D optical model. However, the reduction of the copper thickness in each metallization layer and CMP dishing effects within the pad, have introduced undesired noise in the measurement. To resolve this challenge and to measure structures that are more representative of product, scatterometry has been proposed as an alternative measurement. Scatterometry is a diffraction based optical measurement technique using Rigorous Coupled Wave Analysis (RCWA), where light diffracted from a periodic structure is used to characterize the profile. Scatterometry measurements on 3D structures have been shown to demonstrate strong correlation to electrical resistance parameters for BEOL Etch and CMP processes. However, there is significant modeling complexity in such 3D scatterometry models, in particlar due to complexity of front-end-of-line (FEOL) and middle-of-line (MOL) structures. The accompanying measurement noise associated with such structures can contribute significant measurement error. To address the measurement noise of the 3D structures and the impact of incoming process variation, a hybrid scatterometry technique is proposed that utilizes key information from the structure to significantly reduce the measurement uncertainty of the scatterometry measurement. Hybrid metrology combines measurements from two or more metrology techniques to enable or improve the measurement of a critical parameter. In this work, the hybrid scatterometry technique is evaluated for 7nm and 14nm node BEOL measurements of interlayer dielectric (ILD) thickness, hard mask thickness and dielectric trench etch in complex 3D structures. The data obtained from the hybrid scatterometry technique demonstrates stable measurement precision, improved within wafer and wafer to wafer range, robustness in cases where 3D scatterometry measurements incur undesired shifts in the measurements, accuracy as compared to TEM and correlation to process deposition time. Process capability indicator comparisons also demonstrate improvement as compared to conventional scatterometry measurements. The results validate the suitability of the method for monitoring of production BEOL processes.
Device scaling has not only driven the use of measurements on more complex structures, in terms of geometry, materials, and tighter ground rules, but also the need to move away from non-patterned measurement sites to patterned ones. This is especially of concern for very thin film layers that have a high thickness dependence on structure geometry or wafer pattern factor. Although 2-dimensional (2D) sites are often found to be sufficient for process monitoring and control of very thin films, sometimes 3D sites are required to further simulate structures within the device. The measurement of film thicknesses only a few atoms thick on complex 3D sites, however, are very challenging. Apart from measuring thin films on 3D sites, there is also a critical need to measure parameters on 3D sites, which are weak and less sensitive for OCD (Optical Critical Dimension) metrology, with high accuracy and precision. Thus, state-ofthe-art methods are needed to address such metrology challenges. This work introduces the concept of Enhanced OCD which uses various methods to improve the sensitivity and reduce correlations for weak parameters in a complex measurement. This work also describes how more channels of information, when used correctly, can improve the precision and accuracy of weak, non-sensitive or complex parameters of interest.
Advanced technology nodes, 10 nm and beyond, employing multipatterning techniques for pitch reduction pose new process and metrology challenges in maintaining consistent positioning of structural features. A self-aligned quadruple patterning (SAQP) process is used to create the fins in FinFET devices with pitch values well below optical lithography limits. The SAQP process bears the compounding effects from successive reactive ion etch and spacer depositions. These processes induce a shift in the pitch value from one fin compared to another neighboring fin. This is known as pitch walking. Pitch walking affects device performance as well as later processes, which work on an assumption that there is consistent spacing between fins. In SAQP, there are three pitch walking parameters of interest, each linked to specific process steps in the flow. These pitch walking parameters are difficult to discriminate at a specific process step by singular evaluation technique or even with reference metrology, such as transmission electron microscopy. We will utilize a virtual reference to generate a scatterometry model to measure pitch walk for SAQP process flow.
Advanced technology nodes, 10nm and beyond, employing multi-patterning techniques for pitch reduction pose new process and metrology challenges in maintaining consistent positioning of structural features. Self-Aligned Quadruple Patterning (SAQP) process is used to create the Fins in FinFET devices with pitch values well below optical lithography limits. The SAQP process bares compounding effects from successive Reactive Ion Etch (RIE) and spacer depositions. These processes induce a shift in the pitch value from one fin compared to another neighboring fin. This is known as pitch walking. Pitch walking affects device performance as well as later processes which work on an assumption that there is consistent spacing between fins. In SAQP there are 3 pitch walking parameters of interest, each linked to specific process steps in the flow. These pitch walking parameters are difficult to discriminate at a specific process step by singular evaluation technique or even with reference metrology such as Transmission Electron Microscopy (TEM). In this paper we will utilize a virtual reference to generate a scatterometry model to measure pitch walk for SAQP process flow.
Complexity of process steps integration and material systems for next-generation technology nodes is reaching unprecedented levels, the appetite for higher sampling rates is on the rise, while the process window continues to shrink. Current thickness metrology specifications reach as low as 0.1A for total error budget – breathing new life into an old paradigm with lower visibility for past few metrology nodes: accuracy. Furthermore, for advance nodes there is growing demand to measure film thickness and composition on devices/product instead of surrogate planar simpler pads. Here we extend our earlier work in Hybrid Metrology to the combination of X-Ray based reference technologies (high performance) with optical high volume manufacturing (HVM) workhorse metrology (high throughput). Our stated goal is: put more “eyes” on the wafer (higher sampling) and enable move to films on pattern structure (control what matters). Examples of 1X front-end applications are used to setup and validate the benefits.
KEYWORDS: Metrology, Critical dimension metrology, Semiconducting wafers, Reactive ion etching, Etching, Data processing, Data communications, Process control, Algorithm development
Hybrid metrology (HM) is the practice of combining measurements from multiple toolset types in order to enable or improve metrology for advanced structures. HM is implemented in two phases: Phase-1 includes readiness of the infrastructure to transfer processed data from the first toolset to the second. Phase-2 infrastructure allows simultaneous transfer and optimization of raw data between toolsets such as spectra, images, traces – co-optimization. We discuss the extension of Phase-1 to include direct high-bandwidth communication between toolsets using a hybrid server, enabling seamless fab deployment and further laying the groundwork for Phase-2 high volume manufacturing (HVM) implementation. An example of the communication protocol shows the information that can be used by the hybrid server, differentiating its capabilities from that of a host-based approach. We demonstrate qualification and production implementation of the hybrid server approach using CD-SEM and OCD toolsets for complex 20nm and 14nm applications. Finally we discuss the roadmap for Phase-2 HM implementation through use of the hybrid server.
KEYWORDS: Copper, Chemical mechanical planarization, Scatterometry, Metrology, Semiconducting wafers, Resistance, Reactive ion etching, Etching, 3D modeling, Back end of line
Copper interconnects have been adopted in advanced semiconductor manufacturing due to benefits of reduced RC delay, cross talk and power consumption. With each technology node, interconnects reduce in size resulting in increased line resistivity, a critical metric in determining the device performance. Reactive Ion Etching (RIE) and Copper Chemical Mechanical Polishing (Cu CMP) are two of the key back end of the line (BEOL) processes that affect the interconnect performance. Due to variations from incoming processes and the inherent variability induced by these processes, dielectric trench depth and resulting copper line height variations that can potentially result from these processes have direct impact to RC delay.
Traditional inline metrology methods used are time consuming and do not provide the needed wafer level metrics. In addition, measurement of remaining dielectric thickness on solid pads is not a good representative of the actual device structures and has been inaccurate for process due to dishing of the copper pads. Efficient control of BEOL processes requires measurement of metal line thickness and other critical profile parameters from which resistance can be extracted. In order to relate BEOL process steps and understand their interactions, it is necessary to have a directly comparable measurement methodology on a similar measurement structure.
Over the past several years, scatterometry has been proven as the only metrology method to provide the full profile information of the Cu lines. Scatterometry is a diffraction based optical measurement technique using Rigorous Coupled Wave Analysis (RCWA), where light diffracted from a periodic structure is used to characterize the details of profile. Unique algorithms, such as Holistic Metrology can be used to make the scatterometry development process faster.
In this paper, we will present how scatterometry can be used to measure copper line height on 3D structures and how feed forward from RIE can be applied for control of Cu CMP process for 20nm technology node. The importance of incoming trench depth variations is demonstrated for CMP polish time control in order to stabilize the copper line height. Validation data is presented for different scatterometry models including accuracy, repeatability and DoE tracking. Electrical resistance is shown to correlate to the copper trench profile measured by scatterometry. The paper will demonstrate the capability for reducing copper line height variation and the correlation of the reducing trench height variation to improved stabilization of electrical resistance.
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