Dr. Arindam Mallik Profile

Dr. Arindam Mallik

Specialist Researcher at imec

SPIE Involvement:

Author | Instructor

Proceedings Article | 23 April 2018 Paper

EUVL Gen 2.0: key requirements for constraining semiconductor cost in advanced technology node manufacturing

Arindam Mallik, Peter Debacker, Greg McIntyre, Ryoung-Han Kim, Kurt Ronse

Proceedings Volume 10583, 1058326 (2018) https://doi.org/10.1117/12.2297447

KEYWORDS: Extreme ultraviolet lithography, Extreme ultraviolet, Optical lithography, Semiconductors, Lithography, Semiconducting wafers, Metals, Manufacturing, Double patterning technology, Photomasks

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Proceedings Article | 23 March 2018 Presentation + Paper

Electrical comparison of iN7 EUV hybrid and EUV single patterning BEOL metal layers

Stéphane Larivière, Christopher Wilson, Bogumila Kutrzeba Kotowska, Janko Versluijs, Stefan Decoster, Ming Mao, Marleen van der Veen, Nicolas Jourdan, Zaid El-Mekki, Nancy Heylen, Els Kesters, Patrick Verdonck, Christophe Béral, Dieter Van den Heuvel, Peter De Bisschop, Joost Bekaert, Victor Blanco, Ivan Ciofi, Danny Wan, Basoene Briggs, Arindam Mallik, Eric Hendrickx, Ryoung-han Kim, Greg McIntyre, Kurt Ronse, Jürgen Bömmels, Zsolt Tőkei, Dan Mocuta

Proceedings Volume 10583, 105830U (2018) https://doi.org/10.1117/12.2299389

KEYWORDS: Extreme ultraviolet, Optical lithography, Etching, Tin, Resistance, Metals, Semiconducting wafers, Critical dimension metrology, Photomasks, Copper

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Proceedings Article | 20 March 2018 Paper

Exploration of BEOL line-space patterning options at 12 nm half-pitch and below

S. Decoster, F. Lazzarino, L. Petersen Barbosa Lima, W. Li, J. Versluijs, S. Halder, A. Mallik, G. Murdoch

Proceedings Volume 10589, 105890E (2018) https://doi.org/10.1117/12.2297183

KEYWORDS: Dielectrics, Line edge roughness, Scanning electron microscopy, Etching, Photoresist materials, Metals, Oxides

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Proceedings Article | 7 April 2017 Presentation + Paper

Self-aligned block technology: a step toward further scaling

Frédéric Lazzarino, Nihar Mohanty, Yannick Feurprier, Lior Huli, Vinh Luong, Marc Demand, Stefan Decoster, Victor Vega Gonzalez, Julien Ryckaert, Ryan Ryoung Han Kim, Arindam Mallik, Philippe Leray, Chris Wilson, Jürgen Boemmels, Kaushik Kumar, Kathleen Nafus, Anton deVilliers, Jeffrey Smith, Carlos Fonseca, Julie Bannister, Steven Scheer, Zsolt Tokei, Daniele Piumi, Kathy Barla

Proceedings Volume 10149, 1014908 (2017) https://doi.org/10.1117/12.2258028

KEYWORDS: Optical lithography, Etching, Photomasks, Double patterning technology, Extreme ultraviolet, Semiconductors, High volume manufacturing, Metals, Standards development, Lithography, Amorphous silicon, Coating, System on a chip, Materials processing, Silica, Tin

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Proceedings Article | 24 March 2017 Presentation + Paper

Single exposure EUV patterning of BEOL metal layers on the IMEC iN7 platform

V. Blanco Carballo, J. Bekaert, M. Mao, B. Kutrzeba Kotowska, S. Larivière, I. Ciofi, R. Baert, R. H. Kim, E. Gallagher, E. Hendrickx, L. E. Tan, W. Gillijns, D. Trivkovic, P. Leray, S. Halder, M. Gallagher, F. Lazzarino, S. Paolillo, D. Wan, A. Mallik, Y. Sherazi, G. McIntyre, M. Dusa, P. Rusu, T. Hollink, T. Fliervoet, F. Wittebrood

Proceedings Volume 10143, 1014318 (2017) https://doi.org/10.1117/12.2258005

KEYWORDS: Metals, Extreme ultraviolet lithography, Optical lithography, Back end of line, Extreme ultraviolet, Etching, Semiconducting wafers, Logic, Critical dimension metrology, Tin

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Proceedings Article | 16 April 2015 Paper

Maintaining Moore’s law: enabling cost-friendly dimensional scaling

Arindam Mallik, Julien Ryckaert, Abdelkarim Mercha, Diederik Verkest, Kurt Ronse, Aaron Thean

Proceedings Volume 9422, 94221N (2015) https://doi.org/10.1117/12.2086085

KEYWORDS: Extreme ultraviolet lithography, Optical lithography, Surface plasmons, Extreme ultraviolet, Photomasks, Back end of line, Lithography, Metals, Semiconducting wafers, Semiconductors

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Proceedings Article | 18 March 2015 Paper

DTCO at N7 and beyond: patterning and electrical compromises and opportunities

Julien Ryckaert, Praveen Raghavan, Pieter Schuddinck, Huynh Bao Trong, Arindam Mallik, Sushil Sakhare, Bharani Chava, Yasser Sherazi, Philippe Leray, Abdelkarim Mercha, Jürgen Bömmels, Gregory McIntyre, Kurt Ronse, Aaron Thean, Zsolt Tökei, An Steegen, Diederik Verkest

Proceedings Volume 9427, 94270C (2015) https://doi.org/10.1117/12.2178997

KEYWORDS: Optical lithography, Metals, Transistors, Standards development, Logic, Resistance, Lithography, Extreme ultraviolet, Extreme ultraviolet lithography, Field effect transistors

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Proceedings Article | 17 April 2014 Paper

The economic impact of EUV lithography on critical process modules

Arindam Mallik, Naoto Horiguchi, Jürgen Bömmels, Aaron Thean, Kathy Barla, Geert Vandenberghe, Kurt Ronse, Julien Ryckaert, Abdelkarim Mercha, Laith Altimime, Diederik Verkest, An Steegen

Proceedings Volume 9048, 90481R (2014) https://doi.org/10.1117/12.2046310

KEYWORDS: Extreme ultraviolet lithography, Optical lithography, Lithography, Extreme ultraviolet, Semiconducting wafers, Semiconductors, Photomasks, Back end of line, Metals, Front end of line

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Proceedings Article | 8 April 2013 Paper

The need for EUV lithography at advanced technology for sustainable wafer cost

Arindam Mallik, Wim Vansumere, Julien Ryckaert, Abdelkarim Mercha, Naoto Horiguchi, Steven Demuynck, Jürgen Bömmels, Tokei Zsolt, Geert Vandenberghe, Kurt Ronse, Aaron Thean, Diederik Verkest, Hans Lebon, An Steegen

Proceedings Volume 8679, 86792Y (2013) https://doi.org/10.1117/12.2011528

KEYWORDS: Semiconducting wafers, Lithography, Extreme ultraviolet lithography, Extreme ultraviolet, Photomasks, Optical lithography, Semiconductors, Databases, Back end of line, 193nm lithography

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Showing 5 of 9 publications

Course Instructor

SC1101: Understanding Design-Patterning Interactions

This course explains how layout and circuit design interact with lithography choices. We especially focus on multi-patterning technologies such as LELE double patterning and SADP. We will explore role of design in lithography technology development as well as in lithographic process control. We will further discuss design enablement of multi-patterning technologies, especially in context of cell-based digital designs.

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SC1187: Understanding Design-Patterning Interactions for EUV and DSA

EUV lithography and DSA haven been accepted by the industry as most promising candidates for dimensional scaling enablement at N7 technology node and beyond. This tutorial explains how introduction of such lithography technologies going to impact layout and circuit design. Choices of lithography would impact physical design and have a significant impact at system level. This tutorial will focus on transition from 193i multi-patterning technologies to EUV lithography and DSA. Factors that would determine on the enablement of these technologies would be highlighted and possible solutions would be shared.

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