Dr. Jiahui Wang
at imec
SPIE Involvement:
Author
Publications (6)

Proceedings Article | 12 November 2024 Presentation + Paper
Darko Trivković, Xuelong Shi, Yi-Pei Tsai, Chieh-Miao Chang, Jane Wang, Victoria Malacara, Balakumar Baskaran, Youssef Drissi, Joost Bekaert, Kenichi Miyaguchi
Proceedings Volume 13216, 132160I (2024) https://doi.org/10.1117/12.3036470
KEYWORDS: Photomasks, Critical dimension metrology, Metrology, Optical proximity correction, Manufacturing, Semiconducting wafers, Logic, Industry, Industrial applications, Silicon photonics

Proceedings Article | 10 April 2024 Presentation + Paper
Jiahui Wang, Emily Gallagher, Jeroen Van de Kerkhove, Rik Jonckheere, Darko Trivkovic
Proceedings Volume 12953, 129530A (2024) https://doi.org/10.1117/12.3011038
KEYWORDS: Line edge roughness, Semiconducting wafers, Design, Tunable filters, Light sources and illumination, Extreme ultraviolet lithography, Scanning electron microscopy, Scanners, Optical filters, Image analysis

Proceedings Article | 28 April 2023 Poster + Paper
Proceedings Volume 12495, 124951U (2023) https://doi.org/10.1117/12.2658866
KEYWORDS: Extreme ultraviolet, Semiconducting wafers, Photomasks, Fin field effect transistors, Optical lithography, Front end of line, Manufacturing, Back end of line, Yield improvement, Extreme ultraviolet lithography

Proceedings Article | 26 May 2022 Presentation + Paper
Proceedings Volume 12052, 1205203 (2022) https://doi.org/10.1117/12.2617415
KEYWORDS: Extreme ultraviolet, Semiconducting wafers, Photomasks, Manufacturing, Optical lithography, Yield improvement, Front end of line, Semiconductor manufacturing, Performance modeling, Back end of line

Proceedings Article | 12 October 2021 Presentation + Paper
Gioele Mirabelli, Jane Wang, Darko Trivkovic, Pieter Weckx, Alessio Spessot, Kurt Ronse, Ryoung Han Kim, Geert Hellings, Julien Ryckaert
Proceedings Volume 11854, 118540D (2021) https://doi.org/10.1117/12.2600804
KEYWORDS: Extreme ultraviolet, Optical lithography, Metals, Lithography, Extreme ultraviolet lithography, Back end of line, Semiconducting wafers, Standards development, Front end of line, Very large scale integration

Showing 5 of 6 publications
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