Mr. Hiromitsu Mashita Profile

Hiromitsu Mashita

at KIOXIA Corp

SPIE Involvement:

Author

Publications (14)

Proceedings Article | 23 March 2020 Presentation + Paper

Advanced memory cell design optimization with inverse lithography technology

Jiro Higuchi, Weiting Wang, Takamasa Takaki, Hiromitsu Mashita, Shigeki Nojima, Ahmed Omran, Ken Hanafusa, Seunghee Baek, Ryan Chen, Yukio Asaka, Kyle Braam, Hironobu Taoka, Guangming Xiao

Proceedings Volume 11328, 1132806 (2020) https://doi.org/10.1117/12.2557847

KEYWORDS: Photomasks, Lithography, Optical proximity correction, Bridges, Data analysis, Semiconducting wafers, Resolution enhancement technologies, SRAF

Read Abstract +

Proceedings Article | 28 March 2014 Paper

Configurable hot spot fixing system

Masanari Kajiwara, Sachiko Kobayashi, Hiromitsu Mashita, Ryota Aburada, Nozomu Furuta, Toshiya Kotani

Proceedings Volume 9053, 90530G (2014) https://doi.org/10.1117/12.2046272

KEYWORDS: Lithography, Neodymium, Optical proximity correction, SRAF, Photomasks, Surface conduction electron emitter displays, Semiconductors, Critical dimension metrology, Image processing, Semiconducting wafers

Read Abstract +

Proceedings Article | 23 March 2012 Paper

Development of practical flare correction tool for full chip in EUV lithography

Taiga Uno, Hiromitsu Mashita, Masahiro Miyairi, Toshiya Kotani

Proceedings Volume 8322, 83221N (2012) https://doi.org/10.1117/12.916129

KEYWORDS: Optical proximity correction, Extreme ultraviolet lithography, Lithography, Extreme ultraviolet, Critical dimension metrology, Semiconducting wafers, Optical lithography, Model-based design, Computer simulations, Data corrections

Read Abstract +

Proceedings Article | 20 May 2011 Paper

Defect printability of advanced binary film photomask

Masato Naka, Shinji Yamaguchi, Keiko Morishita, Shingo Kanamitsu, Ryoji Yoshikawa, Hiromitsu Mashita, Takashi Hirano

Proceedings Volume 8081, 80810Q (2011) https://doi.org/10.1117/12.899899

KEYWORDS: Photomasks, Semiconducting wafers, Critical dimension metrology, Opacity, Inspection, Lithography, Binary data, Scanning electron microscopy, Defect detection, Phase shifts

Read Abstract +

Based on an acceptable wafer critical dimension (CD) variation that takes device performance into consideration, we presented a methodology for deriving an acceptable mask defect size using defect printability [1]-[3]. The defect printability is measurable by Aerial Image Measurement System (AIMS^TM) and simulated by lithography simulation without exposure. However, the defect printability of these tools is not always the same as the actual one. Therefore, the accuracy of these tools is confirmed by fabricating the programmed defect mask and exposing this mask on wafer. Advanced Binary Film (ABF) photomask has recently been studied as a substitute for the conventional MoSi phase shift mask. For ABF photomask fabrication, mask performance for process and guarantee for mask defects by repair and inspection are important. With regard to the mask performance, the ABF photomask has high performance in terms of resolution of pattern making, placement accuracy, and cleaning durability [4]. With regard to the guarantee for mask defects, it has already been confirmed that the defect on the ABF photomask is repairable for both clear and opaque defects. However, it has not been evaluated for inspection yet. Therefore, it is necessary to evaluate the defect printability, to derive the acceptable mask defect size, and to confirm the sensitivity of mask inspection tool. In this paper, the defect printability of the ABF photomask was investigated by the following process. Firstly, for opaque and clear defects, sizes and locations were designed as parameters for memory cell patterns. Secondly, the ABF programmed defect mask was fabricated and exposed. Thirdly, mask defect sizes on the ABF programmed defect mask and line CD variations on the exposed wafer were measured with CD-SEM. Finally, the defect printability was evaluated by comparing the correlation between the mask defect sizes and the wafer line CD variations with that of the AIMSTM and the lithography simulation. From these results, the defect printability of AIMS^TM was almost the same as the actual one. On the other hand, the defect printability of the lithography simulation was relaxed from the actual one for the isolated defect types for both clear and opaque defects, though the defect printability for the edge defect types was almost the same. Additionally, the acceptable mask defect size based on the actual defect printability was derived and the sensitivity of the mask inspection tool (NPI-7000) was evaluated. Consequently, the sensitivity of the NPI-7000 was detectable for the derived acceptable mask defect size. Therefore, it was confirmed that the ABF photomask could be guaranteed for mask defects.

Proceedings Article | 26 May 2010 Paper

Development of computational spacer patterning technology

Hiromitsu Mashita, Takafumi Taguchi, Fumiharu Nakajima, Katsumi Iyanagi, Toshiya Kotani, Shoji Mimotogi, Soichi Inoue

Proceedings Volume 7748, 77480S (2010) https://doi.org/10.1117/12.868940

KEYWORDS: Optical lithography, Photomasks, Lithography, Etching, Critical dimension metrology, Design for manufacturing, Optical proximity correction, Semiconducting wafers, Design for manufacturability, Deposition processes

Read Abstract +

Proceedings Article | 20 March 2010 Paper

Study of practical TAT reduction approaches for EUV flare correction

Ryoichi Inanami, Hiromitsu Mashita, Takamasa Takaki, Toshiya Kotani, Suigen Kyoh, Satoshi Tanaka

Proceedings Volume 7636, 763616 (2010) https://doi.org/10.1117/12.846326

KEYWORDS: Photomasks, Semiconducting wafers, Extreme ultraviolet lithography, Point spread functions, Scattering, Critical dimension metrology, Convolution, Extreme ultraviolet, Optical proximity correction, Lithography

Read Abstract +

Proceedings Article | 11 December 2009 Paper

Mask defect specification in the spacer patterning process by using a fail-bit-map analysis

Seiro Miyoshi, Shinji Yamaguchi, Masato Naka, Keiko Morishita, Takashi Hirano, Hiroyuki Morinaga, Hiromitsu Mashita, Ayumi Kobiki, Makoto Kaneko, Hidefumi Mukai, Minori Kajimoto, Takashi Sugihara, Yoshiyuki Horii, Yoshihiro Yanai, Tadahito Fujisawa, Kohji Hashimoto, Soichi Inoue

Proceedings Volume 7520, 752014 (2009) https://doi.org/10.1117/12.837132

KEYWORDS: Photomasks, Opacity, Semiconducting wafers, Optical lithography, Etching, Failure analysis, Photoresist materials, Photoresist developing, Lithography, Critical dimension metrology

Read Abstract +

Proceedings Article | 11 May 2009 Paper

Novel OPC and DfM methodology for 3D memory device

Takafumi Taguchi, Toshiya Kotani, Hidefumi Mukai, Hiromitsu Mashita, Katsumi Iyanagi, Koji Hashimoto, Soichi Inoue

Proceedings Volume 7379, 73791O (2009) https://doi.org/10.1117/12.824301

KEYWORDS: Optical proximity correction, Reactive ion etching, Lithography, Personal protective equipment, Design for manufacturing, Etching, Optical design, 3D modeling, Photomasks, Critical dimension metrology

Read Abstract +

Proceedings Article | 4 December 2008 Paper

Mask specification guidelines in spacer patterning technology

Kohji Hashimoto, Hidefumi Mukai, Seiro Miyoshi, Shinji Yamaguchi, Hiromitsu Mashita, Yuuji Kobayashi, Kenji Kawano, Takashi Hirano

Proceedings Volume 7140, 714022 (2008) https://doi.org/10.1117/12.804744

KEYWORDS: Photomasks, Optical lithography, Semiconducting wafers, Line width roughness, Lithography, Opacity, Etching, Photoresist processing, Materials processing, Double patterning technology

Read Abstract +

Proceedings Article | 17 October 2008 Paper

Mask defect printability in the spacer patterning process

Seiro Miyoshi, Shinji Yamaguchi, Takashi Hirano, Hiromitsu Mashita, Hidefumi Mukai, Ayumi Kobiki, Yuuji Kobayashi, Kohji Hashimoto, Soichi Inoue

Proceedings Volume 7122, 71220P (2008) https://doi.org/10.1117/12.801410

KEYWORDS: Photomasks, Etching, Optical lithography, Opacity, Photoresist materials, Semiconducting wafers, Line width roughness, Photoresist developing, Critical dimension metrology, Lithography

Read Abstract +

Proceedings Article | 20 May 2008 Paper

Tool-induced hotspot fixing flow for high volume products

Hiromitsu Mashita, Toshiya Kotani, Fumiharu Nakajima, Hidefumi Mukai, Kazuya Sato, Satoshi Tanaka, Kohji Hashimoto, Soichi Inoue

Proceedings Volume 7028, 70283I (2008) https://doi.org/10.1117/12.793125

KEYWORDS: Optics manufacturing, Optical proximity correction, Astronomical imaging, Critical dimension metrology, Diffractive optical elements, Wafer-level optics, Lithography, Semiconducting wafers, Apodization, Design for manufacturing

Read Abstract +

Proceedings Article | 17 March 2008 Paper

Robust PPC and DFM methodology for exposure tool variations

Toshiya Kotani, Fumiharu Nakajima, Hiromitsu Mashita, Kazuya Sato, Satoshi Tanaka, Soichi Inoue

Proceedings Volume 6924, 69241F (2008) https://doi.org/10.1117/12.771387

KEYWORDS: Optical proximity correction, Optics manufacturing, Design for manufacturing, Wafer-level optics, Astronomical imaging, Optical design, Critical dimension metrology, Lithography, Design for manufacturability, Optical testing

Read Abstract +

Proceedings Article | 30 October 2007 Paper

Accuracy of mask pattern contour extraction with fine-pixel SEM images

Shinji Yamaguchi, Eiji Yamanaka, Hidefumi Mukai, Toshiya Kotani, Hiromitsu Mashita, Masamitsu Itoh

Proceedings Volume 6730, 673036 (2007) https://doi.org/10.1117/12.747866

KEYWORDS: Photomasks, Lithography, Scanning electron microscopy, Semiconducting wafers, Silicon, Finite element methods, Image acquisition, Metrology, Reliability, Semiconductors

Read Abstract +

The specification of photomask patterns is defined for each semiconductor device technology node based on the ITRS (International Technology Roadmap for Semiconductors). The quality of the photomask patterns has been managed by using a metrology tool for CD (Critical Dimension) and an inspection tool for pattern shape. According to shrinkage of semiconductor device patterns, the lithography margin has gradually become smaller. Consequently, the quality of photomask patterns has been managed by observing small lithography margin patterns in addition to the conventional quality management patterns with the conventional metrology tool. Furthermore, recently, as each successive device generation has become shorter, rapid improvement of not only turnaround time of photomask manufacturing but also yield of semiconductor device manufacturing has become necessary. Therefore, the importance of the flexible mask specifications concept is increasing. The quality of photomask patterns with respect to the specifications is judged in terms of pass/fail based on the allowable lithography margin. The methodology is that small lithography margin patterns are selected, micrographs of the selected photomask patterns are acquired by a metrology tool, photomask pattern contours are extracted with the micrographs, resist patterns exposed on Si wafer are simulated by using the photomask pattern contours with lithography simulation under actual exposure conditions, the lithography margin is calculated and the quality of the photomask is judged in terms of pass/fail criteria based on the lithography margin for each generation, device and layer. For management of the quality of photomask patterns based on the flexible mask specifications, it is necessary to measure two-dimensional patterns such as hot-spot patterns for each critical layer in devices having small lithography margin. Therefore, in order to manage quality in the case of flexible mask specifications, a two-dimensional photomask pattern contour extraction tool was studied and developed. The photomask pattern contour extraction tool realizes the combination of acquisition of fine-pixel SEM images of the photomask patterns in wide field and extraction of photomask pattern contours by using the acquired fine-pixel SEM images. There have been many reports on the repeatability and reliability of CD and two-dimensional pattern metrology tools based on the conventional specifications. However, there are very few reports on the repeatability and reliability of photomask pattern metrology tools based on flexible mask specifications. In this paper, using small lithography margin patterns, firstly, the fine-pixel SEM images of photomask patterns are acquired. Secondly, contours of the photomask patterns are extracted with the SEM images. Thirdly, contours of resist patterns on Si wafer are simulated with lithography simulation under actual exposure condition by using the actual photomask pattern contours. Finally, the lithography margin is calculated by using FEM (Focus Exposure Matrix) for the simulated contours of resist patterns. This flow is repeated. The lithography margin with this flow is compared with that of actual exposed wafers. Repeatability and reliability of the lithography margin is evaluated. As a result, accuracy of the photomask pattern contour extraction tool is discussed.

Proceedings Article | 11 May 2007 Paper

Mask quality assurance in cleaning for haze elimination using flexible mask specifications

Kyo Otsubo, Shinji Yamaguchi, Yukiyasu Arisawa, Hidefumi Mukai, Toshiya Kotani, Hiromitsu Mashita, Hiromitsu Hashimoto, Takashi Kamo, Tomohiro Tsutsui, Osamu Ikenaga

Proceedings Volume 6607, 660708 (2007) https://doi.org/10.1117/12.728921

KEYWORDS: Photomasks, Lithography, Air contamination, Transmittance, Semiconducting wafers, Critical dimension metrology, Semiconductors, Computer simulations, Scanning electron microscopy, Manufacturing

Read Abstract +

Showing 5 of 14 publications

View contact details

UPDATE YOUR PROFILE

Is this your profile? Update it now.

Sign into your SPIE.org account

Don’t have a profile and want one?

Create an account on SPIE.org

Keywords/Phrases

Search In:

Publication Years