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Dr. Mustafa B. Akbulut
Technical Lead, SEMulator3D Quality Assurance
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Profile Summary
Mustafa Akbulut received his Bachelor’s in Computer Engineering from Georgia Tech and his PhD in Electrical Engineering from the University of Connecticut, working on nanoscale transistors. He has joined Coventor in 2014, where he is currently leading the Quality Assurance team for the Semiconductor Solutions.
Publications (3)
Proceedings Article | 24 March 2017 Presentation + Paper
Investigation of 3D photoresist profile effect in self-aligned patterning through virtual fabrication
Mustafa Akbulut, Jiangjiang Gu, Andras Pap, Vasanth Allampalli, Daniel Faken, Joseph Ervin, Ken Greiner, David Fried
Proceedings Volume 10147, 101470G (2017) https://doi.org/10.1117/12.2258157
KEYWORDS: Photoresist materials, Line edge roughness, Critical dimension metrology, Metals, Optical lithography, Double patterning technology, Capacitance, Photoresist processing, Front end of line, Back end of line, Etching, Transistors
SPIE Journal Paper | 13 September 2016
Virtual fabrication using directed self-assembly for process optimization in a 14-nm dynamic random access memory
Mattan Kamon, Mustafa Akbulut, Yiguang Yan, Daniel Faken, Andras Pap, Vasanth Allampalli, Ken Greiner, David Fried
JM3, Vol. 15, Issue 03, 031605, (September 2016) https://doi.org/10.1117/12.10.1117/1.JMM.15.3.031605
KEYWORDS: Directed self assembly, Etching, Optical lithography, Process modeling, Capacitors, Device simulation, 3D modeling, Polymers, Virtual reality, Reactive ion etching
Proceedings Article | 22 March 2016 Paper
Virtual fabrication using directed self-assembly for process optimization in a 14nm DRAM
Mattan Kamon, Mustafa Akbulut, Yiguang Yan, Daniel Faken, Andras Pap, Vasanth Allampalli, Ken Greiner, David Fried
Proceedings Volume 9777, 977710 (2016) https://doi.org/10.1117/12.2218935
KEYWORDS: Directed self assembly, Process modeling, Optical lithography, Capacitors, Lithography, Optimization (mathematics), Semiconductors, Software development, Interfaces, Transistors, Logic, Etching, Reactive ion etching, Device simulation, 3D modeling, Polymers, Virtual reality
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