KEYWORDS: Directed self assembly, Lithography, Line width roughness, Nanoimprint lithography, Semiconducting wafers, Etching, Electron beam lithography, System on a chip, Critical dimension metrology, Photoresist processing
In the lithography landscape, EUV technology recovered some credibility recently. However, its large adoption remains uncertain. Meanwhile, 193nm immersion lithography, with multiple-patterning strategies, supports the industry preference for advanced-node developments. In this landscape, lithography alternatives maintain promise for continued R&D. Massively parallel electron-beam and nano-imprint lithography techniques remain highly attractive, as they can provide noteworthy cost-of-ownership benefits. Directed self-assembly lithography shows promising resolution capabilities and appears to be an option to reduce multi-patterning strategies. Even if large amount of efforts are dedicated to overcome the lithography side issues, these solutions introduce also new challenges and opportunities for the integration schemes.
Access to the requested content is limited to institutions that have purchased or subscribe to SPIE eBooks.
You are receiving this notice because your organization may not have SPIE eBooks access.*
*Shibboleth/Open Athens users─please
sign in
to access your institution's subscriptions.
To obtain this item, you may purchase the complete book in print or electronic format on
SPIE.org.
INSTITUTIONAL Select your institution to access the SPIE Digital Library.
PERSONAL Sign in with your SPIE account to access your personal subscriptions or to use specific features such as save to my library, sign up for alerts, save searches, etc.