Paper
15 February 2010 Floating gate memory paper transistor
R. Martins, L. Pereira, P. Barquinha, N. Correia, G. Gonçalves, I. Ferreira, C. Dias, E. Fortunato
Author Affiliations +
Proceedings Volume 7603, Oxide-based Materials and Devices; 760314 (2010) https://doi.org/10.1117/12.841036
Event: SPIE OPTO, 2010, San Francisco, California, United States
Abstract
Reported herein is a nonvolatile n-type floating gate memory paper field-effect transistor, emphasizing the role of the paper structure and properties on the device performance recorded such as in the high capacitance per unit area at low frequencies (>2.5 μFcm-2) and so on the set of high charge retention times achieved (>16000 hours). The device was built via the hybrid integration of natural cellulose fibers, which act simultaneously as substrate and gate dielectric, using amorphous indium zinc and gallium indium zinc oxides respectively for the gate electrode and channel layer. This was complemented by the use of continuous patterned metal layers as source/drain electrodes.
© (2010) COPYRIGHT Society of Photo-Optical Instrumentation Engineers (SPIE). Downloading of the abstract is permitted for personal use only.
R. Martins, L. Pereira, P. Barquinha, N. Correia, G. Gonçalves, I. Ferreira, C. Dias, and E. Fortunato "Floating gate memory paper transistor", Proc. SPIE 7603, Oxide-based Materials and Devices, 760314 (15 February 2010); https://doi.org/10.1117/12.841036
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Cited by 3 scholarly publications.
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KEYWORDS
Capacitance

Transistors

Dielectrics

Electrodes

Foam

Data modeling

Indium

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