X-ray speed reading with the MCRC: prototype success and next generation upgrades

Peter Orel; Abigail Y. Pan; Sven Herrmann; Tanmoy Chattopadhyay; Glenn Morris; Haley Stueber; Steven W. Allen; Daniel Wilkins; Gregory Prigozhin; Beverly LaMarr; Richard Foster; Andrew Malonis; Marshall W. Bautz; Michael J. Cooper; Kevan Donlon

doi:10.1117/12.3019147

27 August 2024 X-ray speed reading with the MCRC: prototype success and next generation upgrades

Peter Orel, Abigail Y. Pan, Sven Herrmann, Tanmoy Chattopadhyay, Glenn Morris, Haley Stueber, Steven W. Allen, Daniel Wilkins, Gregory Prigozhin, Beverly LaMarr, Richard Foster, Andrew Malonis, Marshall W. Bautz, Michael J. Cooper, Kevan Donlon

Author Affiliations +

Proceedings Volume 13103, X-Ray, Optical, and Infrared Detectors for Astronomy XI; 131030J (2024) https://doi.org/10.1117/12.3019147
Event: SPIE Astronomical Telescopes + Instrumentation, 2024, Yokohama, Japan

Abstract

The Advanced x-ray Imaging Satellite (AXIS) is a NASA probe class mission concept designed to deliver arcsecond resolution with an effective area ten times that of Chandra (at launch). The AXIS focal plane features an MIT Lincoln Laboratory (MIT-LL) x-ray charge-coupled device (CCD) detector working in conjunction with an application specific integrated circuit (ASIC), denoted the Multi-Channel Readout Chip (MCRC). While this readout ASIC targets the AXIS mission, it is applicable to a range of potential x-ray missions with comparable readout requirements. Designed by the x-ray astronomy and Observational Cosmology (XOC) group at Stanford University, the MCRC ASIC prototype (MCRC-V1.0) uses a 350nm technology node and provides 8 channels of high speed, low noise, low power consumption readout electronics. Each channel implements a current source to bias the detector output driver, a preamplifier to provide gain, and an output buffer to interface directly to an analog-to-digital (ADC) converter. The MCRC-V1 ASIC exhibits comparable performance to our best discrete electronics implementations, but with ten times less power consumption and a fraction of the footprint area. In a total ionizing dose (TID) test, the chip demonstrated a radiation hardness equal or greater to 25krad, confirming the suitability of the process technology and layout techniques used in its design. The next iteration of the ASIC (MCRC-V2) will expand the channel count and extend the interfaces to external circuits, advancing its readiness as a readout-on-a-chip solution for next generation x-ray CCD-like detectors. This paper summarizes our most recent characterization efforts, including the TID radiation campaign and results from the first operation of the MCRC ASIC in combination with a representative MIT-LL CCD.

Conference Presentation

(2024) Published by SPIE. Downloading of the abstract is permitted for personal use only.

Citation Download Citation

Peter Orel, Abigail Y. Pan, Sven Herrmann, Tanmoy Chattopadhyay, Glenn Morris, Haley Stueber, Steven W. Allen, Daniel Wilkins, Gregory Prigozhin, Beverly LaMarr, Richard Foster, Andrew Malonis, Marshall W. Bautz, Michael J. Cooper, and Kevan Donlon "X-ray speed reading with the MCRC: prototype success and next generation upgrades", Proc. SPIE 13103, X-Ray, Optical, and Infrared Detectors for Astronomy XI, 131030J (27 August 2024); https://doi.org/10.1117/12.3019147

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