In the integrated circuits field, the rapid and accurate detection of defects and anomalies is a critical factor in improving lithography process yields. Research on large-scale chip layout pattern feature extraction and clustering algorithms plays a crucial role in enhancing chip manufacturing yield and improving manufacturing processes. This paper proposes a graph matching-based clustering method, leveraging the high redundancy and relatively simple circuit structure of chip layout patterns. Our method innovatively employs a graph-based representation to capture keypoint information in layout patterns, applies dual-similarity constraints to ensure both node and edge similarities, and utilizes agglomerative hierarchical clustering to merge structurally similar patterns, reducing the reliance on typical values. These enhancements allow for better handling of complex geometries, thus improving the efficiency and stability of pattern clustering. Compared to traditional clustering methods based on image statistical characteristics, our approach considers the geometric constraints within the chip layout, achieving effective clustering on large-scale chip layout patterns.
Photolithography is a pivotal stage in integrated circuit chip manufacturing, exerting a direct influence on both the performance and yield of the chips. Its efficacy hinges heavily on the meticulous control of parameters such as focus and exposure dose. Traditionally, the production speed is limited by multiply rounds of lengthy production-adjust process. Speeding up this process in manufacturing has become a pressing problem. To tackle this challenge, we introduce a novel framework that integrates a conditional adversarial network (GAN) with a parameter encoding module to predict the SEM images from layout images coupled with photolithography parameters. During the training phase, we first pre-train the model using paired data from layout images to SEM images, then we fine-tune the model with paired image data and corresponding lithography parameters. This proposed adversarial training process ensures that the generated photolithography images are remarkably similar to authentic SEM images. Moreover, the innovative parameter encoding structure allows the GAN to tailor image generation according to specific lithography parameters. Extensive experiments validate the effectiveness of our method, indicating that we have constructed a precise virtual photolithography model capable of predicting SEM images based on layout and parameter inputs. This approach not only effectively forecasts lithography outcomes but also provides essential technical support to address design challenges in the photolithography process, significantly streamlining the path from design to production.
Recognition rate is traditionally used as the main criterion for evaluating the performance of a recognition system. High recognition reliability with low misclassification rate is also a must for many applications. To handle the variability of the writing style of different individuals, this paper employs decision trees and WRB AdaBoost to design a classifier with high recognition reliability for recognizing Bangla handwritten numerals. Experiments on the numeral images obtained from real Bangladesh envelopes show that the proposed recognition method is capable of achieving high recognition reliability with acceptable recognition rate.
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