Nanoimprint lithography, NIL, has garnered attention as a next-generation semiconductor manufacturing technology because of the advantage of higher resolution to ArF-i lithography and lower cost-of-ownership and power consumption to EUV lithography. Though EB repairing technology for 2X nm NIL templates was demonstrated in the past, resolution, yield and turnaround time of repairing remain significant challenges for sub 20nm feature size. In this work, we propose and evaluate a novel repair technology for NIL templates using multiple patterning techniques. We assessed the repair capability using programmed defects on 19nm line/space (L/S) patterns. Results demonstrate successful repair of a wide range of defects, from edge bumps to 45nm in size. Furthermore, we confirmed no significant impact from overlay errors of ±1nm. This method offers higher resolution and processing capability compared to conventional electron beam (EB) repair techniques, representing a significant step towards realizing sub-20nm defect-free NIL templates.
Nanoimprint lithography, NIL, has been developed for semiconductor lithography technology. In order to extend the field of NIL application, we have proposed templates for transferring three-dimensional shapes, such as dual damascene, and dense hole templates processed by LELE technique, which require high overlay accuracy of EB writing tools. In this presentation, we will discuss the performance of our template fabricated by using various multiple patterning technique. The layout of these templates includes both single layered fine features and multilayered structures, considering applications for random logic patterns and periphery of memory.
KEYWORDS: Nanoimprint lithography, Scanning electron microscopy, Overlay metrology, Fabrication, Lithography, Electron beam lithography, Design and modelling, 3D acquisition, Semiconductors
Nanoimprint lithography, NIL, has been developed for fine feature pattern lithography for semiconductor fabrication as new generation lithography. NIL can realize finer and higher density of 2D patterns without design restriction. Additionally, NIL has potential of transferring 3D shapes if the template has 3D shapes. In this paper, we discussed the performance of our template for dual damascene processing. EB written master template quality targeting sub 20nm half pitch and template replication process of 3D shape was presented.
Nanoimprint lithography, NIL, has been developed for semiconductor lithography technology. Recently, cost-effective process for metal interconnects is one of the main challenges to keep scaling at a certain range of cost. Since NIL has the advantage on the resolution of interconnect patterns without design restriction and potential of transferring three-dimensional shapes, dual damascene by NIL which realize the process of metal interconnects and vias with single lithography step has been proposed. In this presentation, we will discuss the performance of our template for dual damascene processing targeting sub 20nm half pitch.
Nanoimprint lithography, NIL, has been developed for semiconductor lithography technology. Recently three dimensional imprint such as dual damascene pattern fabrication by NIL is proposed. For fine feature templates, double patterning process is proposed for template fabrication. For both application, two or more E-beam writing is required in the template fabrication and the overlay of second writing against first layer is important. In the presentation, we will discuss overlay of E-beam writing in NIL template fabrication.
Development of nanoimprint lithography (NIL) templates is discussed. The template fabrication process and its performance are presented with consideration of the requirements of NIL for high-volume manufacturing. Defectivity, image placement, and critical dimension uniformity are the three major performance parameters of the templates, and their current status is shown.
Performances of the nanoimprint lithography templates were discussed considering the readiness toward the high volume manufacturing of nanoimprint lithography application along with the requirement for the templates and its fabrication process. The current status of the three major performances of the templates was shown.
Nano-Imprint Lithography (NIL) is considered a promising alternative to optical lithography for technology nodes at
22nm hp and beyond. Compared to other advanced and complex lithography methods, NIL processing is simple and
inexpensive making it a widely accepted technology for pattern media and a potential cost effective alternative for
CMOS applications. During the NIL process, the template comes into direct contact with the resist on the substrate and
consequently template cleanliness plays a decisive role in imprinted substrate quality. Furthermore, if the template has
any form of a defect such as resist residue, stains, particles, surface scratches, chipping and bumping etc. it can lead to
poor quality imprints, low yield and throughput decreases.
The latest ITRS roadmap has stringent CD, CD uniformity, surface roughness and defect control requirements for NIL
templates. Any template cleaning process that is adopted must be able to remove defects while maintaining the critical
parameters outlined by the ITRS. Aggressive chemistries (such as NH4OH or SC1 (NH4OH+H2O2+DI) and strong
physical force treatments (such as MegaSonic & Binary Sprays) may cause damage to the template if not optimized.
This paper presents the cleaning chemical effects on template surface roughness and CD at varying concentrations. The
effect of physical force cleaning on fragile and sensitive pattern features is also presented. Particle & imprint resist
removal efficacy at different process conditions is compared.
Most problems in photomask fabrication such as pattern collapse, haze, and cleaning damage are related to the behavior
of surfaces and interfaces of resists, opaque layers, and quartz substrates. Therefore, it is important to control the
corresponding surface and interface energies in photomask fabrication processes. In particular, adhesion analysis in
microscopic regions is strongly desirable to optimize material and process designs in photomask fabrication. We applied
the direct peeling (DP) method with a scanning probe microscope (SPM) tip and measured the adhesion of resist patterns
on Cr and quartz surfaces for photomask process optimization. We measured adhesion and frictional forces between the
resulting collapsed resist pillar and the Cr or the quartz surface before and after the sliding. We also studied the effect of
surface property of the Cr and quartz surfaces to resist adhesion. The adhesion could be controlled by surface
modification using silanes and surface roughness on Cr blanks. We also discuss the relationship between the adhesion
observed with the DP method and the properties of the modified surfaces including water contact angles and local
adhesive forces measured from force-distance curves with an SPM.
In 45nm node and beyond, since mask topography effect is not ignorable, 3D simulation is required for precise printing performance evaluation and mask CD bias optimization. Therefore, the difference between real mask and 3D mask model on simulation needs to be clarified. Verification of 3D mask model by diffraction intensity measurement with AIMSTM45-193i was discussed in our previous works. In various conditions (mask materials, pattern dimensions and CD-SEMs), the diffraction intensity measured on actual masks were agreed to 3D simulations by introducing constant CD offset. The cause of the CD difference was explained to be mainly due to electron beam size by using simple SEM image simulation.
In this work, we introduce the new procedure to measure diffraction intensity by AIMSTM in order to confirm the CD difference between 3D mask model and CD-SEM more accurately because the agreement of diffraction intensity between AIMSTM and simulation was not perfect especially for 1st order's diffraction. As a result, the value of CD difference was slightly changed on the same mask by using the same CD-SEM. Measured diffraction intensity showed better matching to 3D simulation results with the constant CD offset on all evaluated conditions. Secondary, to confirm how accurately printing performance could be predicted by CD-SEM measurement results, MEEF difference calculated from diffraction intensity between 3D simulation and CD-SEM with the offset was confirmed. Additionally, this method was extended to hole patterns. Measured diffraction intensity was matched to simulation result with the same CD offset with line/space patterns and appropriate corner rounding.
KEYWORDS: Photomasks, 3D modeling, Diffraction, 3D metrology, Lithography, Scanning electron microscopy, Critical dimension metrology, Printing, 3D printing, Image analysis
In 45nm node and beyond with hyper NA lithography, mask topography effect is not ignorable and mask CD bias
impacts printing performance such as MEEF or exposure latitude. In that situation, 3D simulation is required for precise
evaluation of printing performance and the accuracy of 3D mask model on simulation is a key issue. Verification of 3D
mask model by diffraction intensity measurement with AIMSTM45-193i was discussed in our previous works. Through
the verification, though real mask successfully creates effective or simulated diffractions, CD on 3D mask model on
simulation was different to that on AIMSTM result which was measured by CD-SEM. Therefore, purpose of this work is
to analyze the cause of CD differences through AIMSTM diffraction intensity evaluation in various conditions (mask
material, pattern pitch, mask CD bias and mask CD-SEM system). Furthermore, lithography equivalent CD is proposed
as width of "ideal" mask shape.
As a result achieved from the experiments, constant CD shift was successfully observed at hp40-70nm L/S pattern with
varied bias for both 6% EAPSM and Binary masks. It can be said that mask topography difference related to mask
material and pattern dimensions has not been observed. On the other hand, the value of CD shift was smaller on the
condition of newer generation CD-SEM measurement.
Other result achieved from further discussion and analysis, cause of the CD difference was explained using simple SEM
image simulation. The CD difference was mainly changed by electron beam size factor, and it was stable with side wall
angle in the range of 80 to 90 degree if the middle CD, which is the width of 3D model defined at the half height of the
mask film's thickness, is constant. Since side wall angles on actual masks are nearly 90 degree, lithography equivalent
CD could be measured by CD-SEM with constant offset.
Double patterning technology (DPT) is one of the most practical candidate technologies for 45nm half-pitch or beyond
while conventional single exposure (SE) is still dominant with hyper NA avoiding DPT difficulties such as split-conflict
or overlay issue. However small target dimension with hyper NA and strong illumination causes OPC difficulty and
small latitude of lithography and photomask fabricated with much tight specification are required for SE. Then there
must be double patterning (DP) approach even for SE available resolution.
In this paper DP for SE available resolution is evaluated on lithography performance, pattern decomposition, photomask
fabrication and inspection load.
DP includes pattern pitch doubled of SE, then lithography condition such as mask error enhancement factor (MEEF) is
less impacted and the lower MEEF means less tight specification for photomask fabrication.
By using Synopsys DPT software, there are no software-induced conflicts and stitching is treated to be less impact. And
also this software detects split-conflicts such as triangle or square placement from contact spacing.
For estimating photomask inspection load, programmed defect pattern and circuit pattern on binary mask are prepared.
Smaller MEEF leads less impact to defect printing which is confirmed with AIMS evaluation. As an inspection result,
there are few differences of defect sensitivity for only dense features and also few differences of false defect counts
between SE and DP with less NA. But if higher NA used, DP's inspection sensitivity is able to be lowered Then
inspection load for DP would be lighter than SE.
DPL (Double Patterning Lithography) has been identified as one of major candidates for 45nm and 32nm HP since
ITRS2006update and several reports of the performance or challenges of DPL have been published. DPL requires
at least two photomasks with tighter specification of image placement and the difference of mean to target
according to ITRS2006update. On the other hand, approximately half of whole features of single layer are written
on each photomask and the densest features are split into other photomask in consequence of pitch relaxation for
DPL. Then the photomask writing data of two sets for DPL and single data for single exposure are evaluated for
photomask fabrication load. The design will be automatically decomposed with EDA tool and OPC will be tuned
as DPL or single exposure. Not only number of fractured features but also feasibility study of automatic
decomposition will be presented and discussed. The consequences of relaxed pitch on process, inspection, repair,
yield, MEEF and cycle time will be discussed with results as available.
DPL (Double Patterning Lithography) has been in public as one of candidates for 45nm or 32nm HP since
ITRS2006update disclosed. A lot of report of the performances and issues regarding to DPL were published.
The current main concerns are evaluation of the infrastructures such as decomposition software, advanced
photomasks, higher-NA exposure tool and leading-edge hard-mask process. If there is simpler procedure to
evaluate DPL using a conventional environment without hard-mask process, the development of DPL will be
accelerated. Here, the simple evaluation procedure for DPL using actual photomasks combining double
exposure technique was proposed. The pseudo DPL result in terms of mask CD uniformity, image placement
and overlay were demonstrated. In this evaluation procedure, decomposition restriction, mask latitude and
fabrication load were also discussed
Double patterning technology (DPT) is one of candidates to achieve 45nm or 32nm half-pitch and is getting
popular as ITRS2006update(1). ITRS2006update specifies the tight specification of image-placement and the
difference of CD mean-to target of two masks, and they are also evaluated and reported(2). From photomask
fabrication viewpoint or just even employing actual wafer exposure experiment, it's much difficult to evaluate
actual impact on wafer using DPT. Because what observed on wafer is mixture of not only photomask-property but
also exposure's one and new topic of hard-mask process'. In this paper, one evaluation procedure will be proposed
using actual two photomasks and the DPT impact on wafer just from two photomasks will be demonstrated. Then
the approach of wafer image composing procedure with photomask-SEM image, photomask measurement and
exposure simulation will be discussed
The ArF water immersion is one of the most promising candidate technologies for 45-nm node lithography. But it have
been predicted that the realization of 32-nm node (minimum half pitch 45nm) is very difficult when using the water
immersion of 1.35 NA and single mask exposure. Therefore, some double-exposure technologies are expected for
32-nm node logic device. However, the single mask exposure would be expected because it has very big advantage of
short process time and/or cost etc., compared to other double-exposure methods. In this research, we evaluated two NA
setting of ArF immersion as the models and the required structure and error budget of photomasks. One is the maximum
NA of water immersion (= 1.35) and another is using high refractive index materials with NA of 1.55. The lithographic
performance was evaluated for line and space pattern through various pattern pitches with optical proximity correction
(OPC). The evaluation items of printing performance are CD-DOF, contrast-DOF and MEEF, etc. The suitable kind of
mask and structure are also considered with effect of several kinds of mask topography error. The limit of single mask
exposure will be examined by setting the restriction such as minimum half pitch and so on.
Hyper-NA lithography with polarized light illumination is introduced as the solution of 45nm or 32nm node
technology. In that case, consideration of new characteristics of masks and substrates has been required. Mainly,
following three materials, quartz substrates, absorber or phase shifter materials and pellicle films, have been discussed
for that issue.
Item to be discussed on quartz substrates is birefringence. It has been said that birefringence of quartz substrates
affects printed CD on the wafer and is required to control on the masks or substrates. We will report how substrate
birefringence affects the printed CD error by 3D simulations.
Item of absorber or phase shifter material is optical characteristics. We will discuss about how optical parameters of
mask materials affect to diffracted light intensity balance and how these characteristics also affect to printing
performance by 3D simulation results. In the result of this section, we will show current 6%EAPSM film has good
printing performance down to half pitch 45nm.
Item of pellicle film is thickness optimization. It has been described in some papers that the issues will occur if the
film's characteristics will not been changed. Main issue is transmission change caused by film thickness variations. We
will report current pellicle film's performance and will propose how to minimize this issue by the thickness optimization.
In order to confirm those items, we used the pattern model as minimum half-pitch = 45nm and target CD on the
wafer = 45nm for 3D simulations. The illumination condition of the scanner was used as maximum NA=1.35, Dipole or
Cross quadrupole shape and polarized illumination.
In recent years, model-based OPC has been an essential technique to achieve better yield or even if resolution itself.
Currently available OPC software employs optical simulation with thin-mask model or approximated model. However
for 45nm-node and beyond, it is well-known that there is difference between 2D simulation by calculating thin-mask
model and 3D rigorous simulation by calculating thick-mask model such as FDTD or RCWA. Especially, it is expected
that larger incident angle of off-axis illumination and higher aspect ratio of mask topography lead larger differences
between them. On the other hand, thick-mask model OPC consumes much computation time, so it will not be practical.
The difference of these two simulation models is caused from the effect of mask topography and behavior of
electromagnetic field on 3D rigorous simulation. The effect of mask topography also creates the difference of diffraction
amplitude and phase at Fourier optics stage or imaging from diffraction. Then such diffraction orders with thin and
thick-mask model was focused and evaluated at first approach.
In this paper, the difference of diffraction orders' amplitude between two simulation models caused by illumination angle,
mask materials is analyzed and then the difference of OPC bias for various pattern pitches is presented. Then from this
result, the compensation methodology of the diffraction differences is discussed and simple compensation approach for
OPC to improve the accuracy with thin-mask model's OPC is demonstrated. As a result, one new solution for OPC
without additional computer time is proposed.
Hyper-NA lithography with polarized light illumination is introduced as the solution of 45nm or 32nm node
technology. In that case, consideration of new characteristics of mask materials and pellicle films has been required. In
order to analyze the influence of mask material's optical characteristics, we have proposed to use the AIMSTM system
measuring diffraction intensity balance in previous work. That was enabled by acquiring pupil plane images using the
Bertrand lens in the AIMSTM system to measure selected area's diffracted light.
In this study of mask material evaluation, we used same functionality of AIMSTM system, MonoPole illumination
and Bertrand lens, as previous work but other direction's pole is also used on the illumination aperture to cover total
diffraction orders of Cross-quad illumination because this illumination is more flexible for x and y patterns. In order to
get diffracted light of 45nm half-pitch, hyper-NA e.g. NA=1.35 was applied and the AIMSTM 45-193i Alpha system was
used for this evaluation. The examinations were performed with binary and half tone PSM with half pitch 40 to 150nm
on a 1x scale and fixed half pitch 45nm with various mask bias. We confirmed the relation between diffractions' intensity
balance and wafer printing performance for each material and we compared them to 3D simulation results.
Moreover, by using the same functionality of AIMSTM system, the transmission change by pellicle film was also
examined. We have prepared two different thickness pellicles to compare transmission change and printed CD on the
wafer. Intensity profile at pupil plane on the clear region of the mask was acquired with Bertrand lens and conventional
large sigma setting for both with and without pellicle film on the mask. By comparing transmission distribution change
between with and without pellicle, we could calculate transmission loss by pellicle at large incident angles. For this
experiment, NA=1.40 was applied and the AIMSTM 45-193i Alpha system was also used. The examinations were
performed with half tone PSM at half pitch 45nm and 65nm on a 1x scale on linear polarized DiPole illumination.
As a result, we have confirmed good agreement between AIMSTM measurement data and optical 3D simulations. In
conclusion, the AIMSTMsystem is a valuable tool for analyzing diffraction efficiency or intensity distribution on the
pupil plane and comparison to wafer printing performance.
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