We are developing monolithic active pixel sensors, x-ray SOIPIXs based on a Silicon-On-Insulator CMOS technology. Its event trigger output function offers a high time resolution better than ~10 usec. (1) In 2022-23, we and evaluated large sensors, XRPIX-X, with a pixel array size of 14mm x 22mm. We report its design and the results of the performance evaluation. (2) We are developing "Digital X-ray SOIPIXs" for satellite use, featuring on-chip ADCs, DACs, and BGRs for noise robustness. An on-chip clock pattern generator is also included to simplify the readout digital circuits. (3) XRPIXs are increasingly being utilized in various scientific applications beyond x-ray astronomy, and a brief introduction will be provided.
We report wide-field time-domain fluorescence lifetime imaging (TD-FLIM) using a high-photosensitivity 648x484- pixel time-resolved CMOS image sensor with four simultaneous time gates. The advantages of this image sensor are high spatial resolution, high quantum efficiency and high photon rate. In this report, we verified the applicability of a 648x484-pixel range imaging sensor developed in our laboratory for FLIM. In the measurements, four time-resolved images are obtained simultaneously. To improve the temporal sampling resolution, sub sampling is performed. The performance was compared with that of our previously developed 128x128-pixel TD-FLIM CMOS image sensor. The data was analyzed by the phasor method at 20MHz. The measured average fluorescence lifetimes for the new and previous sensors were 8.52 ns and 8.26 ns, and the standard deviations were 0.74 ns and 0.56 ns, respectively. We have achieved higher signal-to-noise ratios as well as high spatial resolution. Finally, this image sensor was used to perform two-dimensional imaging of the fluorescence lifetime of fluorescent acrylic plates.
SignificanceWe present a motion-resistant three-wavelength spatial frequency domain imaging (SFDI) system with ambient light suppression using an 8-tap complementary metal-oxide semiconductor (CMOS) image sensor (CIS) developed at Shizuoka University. The system addresses limitations in conventional SFDI systems, enabling reliable measurements in challenging imaging scenarios that are closer to real-world conditions.AimOur study demonstrates a three-wavelength SFDI system based on an 8-tap CIS. We demonstrate and evaluate the system’s capability of mitigating motion artifacts and ambient light bias through tissue phantom reflectance experiments and in vivo volar forearm experiments.ApproachWe incorporated the Hilbert transform to reduce the required number of projected patterns per wavelength from three to two per spatial frequency. The 8-tap image sensor has eight charge storage diodes per pixel; therefore, simultaneous image acquisition of eight images based on multi-exposure is possible. Taking advantage of this feature, the sensor simultaneously acquires images for planar illumination, sinusoidal pattern projection at three wavelengths, and ambient light. The ambient light bias is eliminated by subtracting the ambient light image from the others. Motion artifacts are suppressed by reducing the exposure and projection time for each pattern while maintaining sufficient signal levels by repeating the exposure. The system is compared to a conventional SFDI system in tissue phantom experiments and then in vivo measurements of human volar forearms.ResultsThe 8-tap image sensor-based SFDI system achieved an acquisition rate of 9.4 frame sets per second, with three repeated exposures during each accumulation period. The diffuse reflectance maps of three different tissue phantoms using the conventional SFDI system and the 8-tap image sensor-based SFDI system showed good agreement except for high scattering phantoms. For the in vivo volar forearm measurements, our system successfully measured total hemoglobin concentration, tissue oxygen saturation, and reduced scattering coefficient maps of the subject during motion (16.5 cm/s) and under ambient light (28.9 lx), exhibiting fewer motion artifacts compared with the conventional SFDI.ConclusionsWe demonstrated the potential for motion-resistant three-wavelength SFDI system with ambient light suppression using an 8-tap CIS.
We demonstrate a motion-resistant, three-wavelength, spatial frequency domain imaging (SFDI) system with ambient light suppression using a new 8-tap CMOS image sensor developed in our laboratory. Compared to the previous sensor (134×150), the new sensor’s readout maximum frame rate has improved to 33fps from 6.28fps, and the new 700×540- pixel sensor allows imaging at a higher spatial resolution over a larger field of view. Furthermore, the number of projected images needed per wavelength is reduced from three to two after applying the Hilbert transform. One image of planar illumination and one image for sinusoidal pattern projection at three wavelengths as well as one image of ambient light are captured by the 8-tap image sensor concurrently. The bias caused by ambient light is removed by subtracting the ambient light image from other images. Suppression of motion artifacts is achieved by reducing the exposure and projection time of each pattern. Sufficient signal level is maintained by repeating the exposure multiple times. In this study, LEDs with wavelengths of 554nm, 660nm, and 730nm were used to estimate oxy-/deoxyhemoglobin and melanin concentrations from in-vivo volar forearm skin.
We evaluate the single event tolerance of the x-ray silicon-on-insulator (SOI) pixel sensor named XRPIX, developed for the future x-ray astronomical satellite FORCE. In this work, we measure the cross-section of single event upset (SEU) of the shift register on XRPIX by irradiating heavy ion beams with linear energy transfer (LET) ranging from 0.022 to 68 MeV / ( mg/cm2 ) . From the SEU cross-section curve, the saturation cross-section and threshold LET are successfully obtained to be 3.4−0.9+2.9×10−10 cm2/bit and 7.3−3.5+1.9 MeV/(mg/cm2), respectively. Using these values, the SEU rate in orbit is estimated to be ≲ 0.1 event / year primarily due to the secondary particles induced by cosmic-ray protons. This SEU rate of the shift register on XRPIX is negligible in the FORCE orbit.
We have been developing monolithic active pixel sensors, X-ray SOIPIXs based on a Silicon-On-Insulator CMOS technology. Its event trigger output function offers a high time resolution better than ~10 usec. (1) We report the device structure optimized to achieve both low noise, a thick depletion layer, and to non-punch-through. (2) We succeeded in achieving an energy resolution of ~300 eV (FWHM) at 6 keV with a depletion layer of 300 um at room temperature by operating frequent reset to reduce the shot noise. (3) We present the development of "Digital X-ray SOIPIXs" having on-chip ADCs, DACs and readout sequencers.
We demonstrate three-wavelength spatial frequency domain imaging (SFDI) of a moving arm under a room light with suppressing motion artifact and biased reflectance based on an 8-tap CMOS image sensor developed in our research group. The images for two projected patters for three wavelengths and that for only ambient light are captured. Three LEDs with the wavelengths of 660nm, 780nm, and 850nm were utilized to decompose the oxy-/ deoxyhemoglobin and melanin concentrations. The exposure time for each frame was 70ms. The total hemoglobin, tissue oxygen saturation, and scattering coefficient maps were obtained without any significant motion artifact.
We demonstrate simultaneous multi-band spatial frequency domain imaging (SFDI) and blood flow mapping by multi-exposure laser speckle contrast imaging (MELSCI) with a laboratory-designed 2x2-aperture 4-tap CMOS image sensor. The proposed imaging device is composed of an array of sub-image sensors. This multi-aperture configuration realizes multi-wavelength imaging to estimate chromophore concentrations and wavelength-division-multiplexed imaging for multi-band SFDI and MELSCI. For SFDI, 450, 550, 660nm LEDs were used as the light sources of a DMD. For MELSCI, a 785nm LD was used for flood illumination. Reflectance and K2 maps of a human arm before and after an exercise was measured.
X-ray silicon-on-insulator (SOI) pixel sensors, “XRPIX,” are being developed for the next-generation x-ray astronomical satellite, “FORCE.” The XRPIX is fabricated with the SOI technology, which makes it possible to integrate a high-resistivity Si sensor and a low-resistivity Si complementary metal oxide semiconductor (CMOS) circuit. The CMOS circuit in each pixel is equipped with a trigger function, allowing us to read out outputs only from the pixels with x-ray signals at the timing of x-ray detection. This function thus realizes high throughput and high time resolution, which enables to employ anti-coincidence technique for background rejection. A new series of XRPIX named XRPIX6E developed with a pinned depleted diode (PDD) structure improves spectral performance by suppressing the interference between the sensor and circuit layers. When semiconductor x-ray sensors are used in space, their spectral performance is generally degraded owing to the radiation damage caused by high-energy protons. Therefore, before using an XRPIX in space, it is necessary to evaluate the extent of degradation of its spectral performance by radiation damage. Thus, we performed a proton irradiation experiment for XRPIX6E for the first time at Heavy Ion Medical Accelerator in Chiba in the National Institute of Radiological Sciences. We irradiated XRPIX6E with high-energy protons with a total dose of up to 40 krad, equivalent to 400 years of irradiation in orbit. The 40-krad irradiation degraded the energy resolution of XRPIX6E by 25 ± 3 % , yielding an energy resolution of 260.1 ± 5.6 eV at the full-width half maximum for 5.9 keV X-rays. However, the value satisfies the requirement for FORCE, 300 eV at 6 keV, even after the irradiation. It was also found that the PDD XRPIX has enhanced radiation hardness compared to previous XRPIX devices. In addition, we investigated the degradation of the energy resolution; it was shown that the degradation would be due to increasing energy-independent components, e.g., readout noise.
We propose a new image sensor based on multi-aperture optics and multi-tap charge modulators for simultaneous multi-band spatial frequency domain imaging (SFDI) and blood flow mapping by multi-exposure laser speckle contrast imaging (ME-LSCI). Wavelength-multiplexed imaging implemented by attaching different bandpass filters to each lens enables to perform multi-band SFDI and ME-LSCI simultaneously. A prototype camera for 4-band SFDI (568, 668, 734, 846nm) and single-band LSCI (780nm) was built based on a commercial CMOS camera with enhanced NIR sensitivity to demonstrate the concept and tested using a rat model of graded burns.
In this study, spatial frequency domain imaging (SFDI) and temporal frequency domain imaging (TFDI) are combined to observe superficial and deep tissues simultaneously using a time-resolving CMOS image sensor. SFDI is an established non-invasive wide-field imaging method for superficial or shallow tissues. On the other hand, time-resolved spectroscopy based near-infrared spectroscopy (TRS-NIRS) is suitable for deep tissue measurement while it is based on point or multipoint measurement. Recently, time-resolving CMOS image sensors based on the single-photon avalanche diode and charge modulators have emerged. To take advantage of their area-imaging capability, we propose a spatio-temporal frequency domain imaging (STFDI=SFDI+TFDI) method, where pulsed binary stripe patterns with a pitch, p, and a duty ratio of 1/N are sequentially projected onto the tissue. While the projected pattern is shifted N times with a step of p/N, time-resolved images are captured for every shift. SFDI is conducted by performing fast Fourier transform (FFT) at each pixel after integrating them in time for each shift. For TFDI, the detected light in the middle of the stripes is analyzed by FFT in time for each shift. Based on the obtained amplitude and phase for specific harmonics orders, the absorption and scattering coefficients are estimated. This concept was verified by a GPU-based Monte Carlo simulator, MCX, with a two-layer skin model. We also experimentally confirmed the difference in the measured reflectance and phase for SFDI and TFDI when the thickness of the first layer was changed.
We are developing an X-ray SOI pixel detector “XRPIX” for the next generation X-ray astronomical satellite “FORCE”. XRPIX is the detector using SOI (Silicon-On-Insulator) technology which makes it possible to integrate a high-resistivity Si sensor part and a low-resistivity Si CMOS circuit part. The CMOS circuit is equipped with the trigger function, which can read out only the output signal of the pixel where the X-ray is incident. This function realizes high throughput and high time resolution, enabling the background rejection with anticoincidence technique. A new series of XRPIX named XRPIX6E, we developed, with a Pinned Depleted Diode (PDD) structure improves the spectral performance by suppressing the interference between the sensor layer and the circuit layer. When semiconductor X-ray detectors are used in space, it is known that their spectral performance is degraded due to radiation damage caused by high-energy protons. Therefore, before using XRPIX in space, it is necessary to evaluate how much the spectral performance will be degraded by radiation damage. Then we performed proton irradiation experiment for XRPIX6E for the first time at HIMAC in National Institute of Radiological Sciences. We irradiated XRPIX with high-energy protons up to a total dose of 40 krad, equivalent to 400 years irradiation in orbit. As a result, the energy resolution in full width half maximum at the 5:9 keV degrades by 25 ± 3%, however, is better than the required performance of FORCE, 300 eV at 6 keV. It was also found that the PDD structure XRPIX has better radiation hardness than the previous XRPIX series. In addition, We investigated about the degradation of the energy resolution; it was found that the degradation would be due to increasing energy independent components, for example, readout noise.
Time-resolved (TR) near-infrared spectroscopy (NIRS) offers non-invasive clinical applications in monitoring the blood oxygenation, where absolute values of oxygenated and deoxygenated hemoglobin, and absorption and scattering coefficient, can be obtained. Various detectors have been utilized to realize a TR-NIRS system, such as PMT, SiPM, and SPAD. This paper proposed a prototype NIRS device implemented using a 128 x 128 lock-in pixel CMOS image sensor (CIS) based on the lateral electric field-charge modulator (LEFM) to achieve high time resolution. Preliminary experiments based on the reflectance of an agar phantom with varying absorption coefficient have been conducted and the ability to detect the changes in the absorption coefficient has been demonstrated. The reflectance of the agar phantom is directly observed by the image sensor, which was operated at a time-window of 900 ps with a sensor detection area of 2.9mm2 . The results suggest that a NIRS device using CIS is feasible, which opens the potential of a miniature wearable time-resolved NIRS device.
Combined with confocal imaging, Fluorescence lifetime imaging microscopy (FLIM) can achieve 3-dimensional optical sectional capability with sub-nanosecond lifetime information. As confocal FLIM acquires multi-dimensional data 4D (3D space + time), it is inherently slow. Recent developments in lock-in pixel imagers with time gated pixels show such detectors are capable of collecting as many as 8-time gates in a single pixel cycle. We present a multiplexed confocal FLIM microscope, equipped with a 4-taps time-gated lock-in pixel imager. The multiplexing setup allows the use of the sparse array with sub-nanosecond time-gating to achieve high throughput FLIM acquisition.
Traffic accidents and mental stress are strongly correlated. Drivers under pressure are more easily to cause accidents. A system which could describe the mental state of a driver would be helpful to avoid such accidents. Multiple indices derived from analysis of heart rate variability (HRV) could be used in the estimation of mental state in humans; moreover, recent years, methods of non-contact heart rate estimation have been well studied and reached high accuracy. Based on both, we developed a real-time driver monitoring system which could not only estimate heart rate of the driver, but also indicate whether he is under pressure or not. This system delivers 2 outputs: heart rate(HR) and mental stress level (stress index). We utilized an 18-bit camera to grab frontal facial frames and independent component analysis (ICA) to extract haemoglobin signal from each frame. After temporal filtering and peak detection, R-R interval(RRI) will be obtained and HR measured. Mental stress estimation will start 30 seconds after we get the first RRI data, then a power spectrum analysis method will be applied to all of the HRV data within 30 seconds to generate powers of Low-Frequency and High-Frequency band data. The ratio of the powers in both bands, so called LF-HF ratio (LF/HF), will be delivered as a stress index to quantify the degree of mental stress. Finally, the validity of stress index is verified over arithmetic calculation and a number of driving-simulating scenarios.
We have been developing monolithic active pixel sensors, X-ray Astronomy SOI pixel sensors, XRPIXs, based on a Silicon-On-Insulator (SOI) CMOS technology as soft X-ray sensors for a future Japanese mission, FORCE (Focusing On Relativistic universe and Cosmic Evolution). The mission is characterized by broadband (1-80 keV) X-ray imaging spectroscopy with high angular resolution (< 15 arcsec), with which we can achieve about ten times higher sensitivity in comparison to the previous missions above 10 keV. Immediate readout of only those pixels hit by an X-ray is available by an event trigger output function implemented in each pixel with the time resolution higher than 10 µsec (Event-Driven readout mode). It allows us to do fast timing observation and also reduces non-X-ray background dominating at a high X-ray energy band above 5{10 keV by adopting an anti-coincidence technique. In this paper, we introduce our latest results from the developments of the XRPIXs. (1) We successfully developed a 3-side buttable back-side illumination device with an imaging area size of 21.9 mm x 13.8 mm and an pixel size of 36 µm x 36 µm. The X-ray throughput with the device reaches higher than 0.57 kHz in the Event-Driven readout mode. (2) We developed a device using the double SOI structure and found that the structure improves the spectral performance in the Event-Driven readout mode by suppressing the capacitive coupling interference between the sensor and circuit layers. (3) We also developed a new device equipped with the Pinned Depleted Diode structure and confirmed that the structure reduces the dark current generated at the interface region between the sensor and the SiO2 insulator layers. The device shows an energy resolution of 216 eV in FWHM at 6.4 keV in the Event-Driven readout mode. .
We have developed and evaluated the large full well capacity (FWC) for wide signal detection range and low temporal noise for high sensitivity lock-in pixel CMOS image sensor (CIS) embedded with two storage-diodes (SDs). In addition, for fast charge transfer from photodiode (PD) to SDs, a lateral electric field charge modulator (LEFM) is used for the developed lock-in pixel. As a result, the time-resolved CIS achieves a very large FWC of approximately 7000e-, low temporal random noise of 1.17e-rms at 45fps with true correlated double sampling (CDS) operation, and fast intrinsic response less than 500ps at 635nm. The proposed imager has an effective pixel array of 128(H)×256(V) and a pixel size of 11.2×11.2μm2. The sensor chip is fabricated by a Dongbu HiTek 1P4M 0.11μm CIS process.
Recently, CMOS time-resolved imaging devices are being widely used for scientific and medical applications. A fluorescence lifetime imaging microscopy (FLIM), which is a powerful analysis tool in fundamental physics as well as in the life science, is a typical application for the time-resolved imaging devices. For better time-resolution in the lock-in pixel design, a multi-tap pixel architecture is very effective and useful. In this paper, we have proposed an 8-tap CMOS lock-in pixel with lateral electric field charge modulator (LEFM) and demonstrated the effectiveness of designed pixel by CAD simulation. The proposed pixel makes possible to measure the highly time-resolved images with a high signal to noise ratio (SNR) and to observe various images of cells even if a sample has a multi-lifetime component. An 8-tap time-resolved CMOS image sensor chip is developed by 0.11μm 1P4M CIS process technology.
This paper presents a CMOS Time-of-Flight (TOF) range imager using pinned-photodiode based high-speed 4-tap lock-in pixels with lateral-electric-field charge modulators (LEFM) in a 0.11 um CIS process. The proposed lock-in pixel structure using lateral electric field control is suitable for implementing a multiple-tap charge modulator while achieving high-speed charge transfer for high time resolution. The TOF imager with the multiple-tap charge modulators is expected to have background light cancelling capability in one frame and to improve range resolution with the 4 time windows for a range-shifted light pulse. Measurement results of the implemented TOF imager with 160×240 pixels are reported.
Auto fluorescence distribution of coenzymes NADH and FAD is investigated for the unstained tumor detection using an [?] originally designed confocal spectroscope. The tumor region in digestive organ can be determined by evaluating the redox index which is defined as the raio of NADH and FAD concentration. However, the redox index is largely influenced by the presence of collagen in the submucosal layer because its auto fluorescence spectrum overlaps considerably with that of NADH. Therefore, it is necessary to know in advance the distribution of NADH, FAD, and collagen in the mucosal layer. The purpose of our study is to investigate the vertical distribution of the redox index in tissue using depth-sensitive auto fluorescence spectroscopy. The experimental procedure and the results are presented.
A CMOS image sensor with deep sub-electron read noise and high pixel conversion gain has been developed. Its performance is recognized through image outputs from an area image sensor, confirming the capability of photoelectroncounting- level imaging. To achieve high conversion gain, the proposed pixel has special structures to reduce the parasitic capacitances around FD node. As a result, the pixel conversion gain is increased due to the optimized FD node capacitance, and the noise performance is also improved by removing two noise sources from power supply. For the first time, high contrast images from the reset-gate-less CMOS image sensor, with less than 0.3e−rms noise level, have been generated at an extremely low light level of a few electrons per pixel. In addition, the photon-counting capability of the developed CMOS imager is demonstrated by a measurement, photoelectron-counting histogram (PCH).
The time resolution of charge modulation in CMOS image sensors has entered the sub-nano second regime and is still reducing toward tens of pico-second. The lateral electric field modulators (LEFM) invented at Shizuoka University has significantly contributed to the recent progress in the solid-state time-resolved imaging field. Based on the LEFM technology, we are developing ultra-high-speed CMOS image sensors whose frame rate or time resolution is determined only by the charge modulation speed. In this presentation, the concept, architecture, example of implementation, and demonstration of 200Mfps single-shot video capturing based on our scheme are shown.
A CMOS image sensor using high-speed lock-in pixels for stimulated Raman scattering (SRS) spectroscopy is presented in this paper. The effective SRS signal from the stimulated emission of SRS mechanism is very small in contrast to the offset of a probing laser source, which is in the ratio of 10-4 to 10-5. In order to extract this signal, the common offset component is removed, and the small difference component is sampled using switched-capacitor integrator with a fully differential amplifier. The sampling is performed over many integration cycles to achieve appropriate amplification. The lock-in pixels utilizes high-speed lateral electric field charge modulator (LEFM) to demodulate the SRS signal which is modulated at high-frequency of 20MHz. A prototype chip is implemented using 0.11μm CMOS image sensor technology.
This paper presents a low-noise wide-dynamic-range pixel design for a high-energy particle detector in astronomical applications. A silicon on insulator (SOI) based detector is used for the detection of wide energy range of high energy particles (mainly for X-ray). The sensor has a thin layer of SOI CMOS readout circuitry and a thick layer of high-resistivity detector vertically stacked in a single chip. Pixel circuits are divided into two parts; signal sensing circuit and event detection circuit. The event detection circuit consisting of a comparator and logic circuits which detect the incidence of high energy particle categorizes the incident photon it into two energy groups using an appropriate energy threshold and generate a two-bit code for an event and energy level. The code for energy level is then used for selection of the gain of the in-pixel amplifier for the detected signal, providing a function of high-dynamic-range signal measurement. The two-bit code for the event and energy level is scanned in the event scanning block and the signals from the hit pixels only are read out. The variable-gain in-pixel amplifier uses a continuous integrator and integration-time control for the variable gain. The proposed design allows the small signal detection and wide dynamic range due to the adaptive gain technique and capability of correlated double sampling (CDS) technique of kTC noise canceling of the charge detector.
To demonstrate the low-noise performance of the multi-aperture imaging system using a selective averaging method, an ultra-high-sensitivity multi-aperture color camera with 2×2 apertures is being developed. In low-light conditions, random telegraph signal (RTS) noise and dark current white defects become visible, which greatly degrades the quality of the image. To reduce these kinds of noise as well as to increase the number of incident photons, the multi-aperture imaging system composed of an array of lens and CMOS image sensor (CIS), and the selective averaging for minimizing the synthetic sensor noise at every pixel is utilized. It is verified by simulation that the effective noise at the peak of noise histogram is reduced from 1.44 e- to 0.73 e- in a 2×2-aperture system, where RTS noise and dark current white defects have been successfully removed. In this work, a prototype based on low-noise color sensors with 1280×1024 pixels fabricated in 0.18um CIS technology is considered. The pixel pitch is 7.1μm×7.1μm. The noise of the sensor is around 1e- based on the folding-integration and cyclic column ADCs, and the low voltage differential signaling (LVDS) is used to improve the noise immunity. The synthetic F-number of the prototype is 0.6.
We have been developing monolithic active pixel sensors, known as Kyoto’s X-ray SOIPIXs, based on the CMOS SOI (silicon-on-insulator) technology for next-generation X-ray astronomy satellites. The event trigger output function implemented in each pixel offers microsecond time resolution and enables reduction of the non-X-ray background that dominates the high X-ray energy band above 5–10 keV. A fully depleted SOI with a thick depletion layer and back illumination offers wide band coverage of 0.3–40 keV. Here, we report recent progress in the X-ray SOIPIX development. In this study, we achieved an energy resolution of 300 eV (FWHM) at 6 keV and a read-out noise of 33 e- (rms) in the frame readout mode, which allows us to clearly resolve Mn-Kα and Kβ. Moreover, we produced a fully depleted layer with a thickness of 500 μm. The event-driven readout mode has already been successfully demonstrated.
We have been researching and developing a CMOS image sensor that has 2.8 μm x 2.8 μm pixel, 33-Mpixel resolution
(7680 horizontal pixels x 4320 vertical pixels), 120-fps frame rate, and 12-bit analog-to-digital converter for “8K Super
Hi-Vision.” In order to improve its sensitivity, we used a 0.11-μm nanofabricated process and attempted to increase the
conversion gain from an electron charge to a voltage in the pixel. The prototyped image sensor shows a sensitivity of 2.4
V/lx•s, which is 1.6 times higher than that of a conventional image sensor. This image sensor also realized the input-referred
random noise as low as 2.1 e-rms.
We have developed and evaluated the high responsivity and low dark leakage CMOS image sensor with the ring-gate shared-pixel design. A ring-gate shared-pixel design with a high fill factor makes it possible to achieve the low-light imaging. As eliminating the shallow trench isolation in the proposed pixel, the dark leakage current is significantly decreased because one of major dark leakage sources is removed. By sharing the in-pixel transistors such as a reset transistor, a select transistor, and a source follower amplifier, each pixel has a high fill-factor of 43 % and high sensitivity of 144.6 ke-/lx·sec. In addition, the effective number of transistors per pixel is 1.75. The proposed imager achieved the relatively low dark leakage current of about 104.5 e-/s (median at 60°C), corresponding to a dark current density Jdark_proposed of about 30 pA/cm2. In contrast, the conventional type test pixel has a large dark leakage current of 2450 e-/s (median at 60°C), corresponding to Jdark_conventional of about 700 pA/cm2. Both pixels have a same pixel size of 7.5×7.5 μm2 and are fabricated in same process.
To observe molecular transport in a living cell, a high-speed CMOS image sensor for multi-point fluorescence correlation spectroscopy is developed. To achieve low-noise and high-speed simultaneously, a prototype CMOS image sensor is designed based on a complete pixel-parallel architecture and multi-channel pipelined pixel readout. The prototype chip with 10×10 effective pixels is fabricated in 0.18-μm CMOS image sensor technology. The pixel pitch and the photosensitive area are 56μm and 10μm in diameter without a microlens, respectively. In the experiment, the total sampling rate of 606kS/s is achieved. The measured average random noise is 24.9LSB, which is equivalent to about 2.5 electrons in average.
This paper presents a time-resolved CMOS image sensor with draining-only modulation (DOM) pixels for tube-less
streak cameras. Although the conventional streak camera has high time resolution, the device requires high voltage and
bulky system due to the structure with a vacuum tube. The proposed time-resolved imager with a simple optics realize a
streak camera without any vacuum tubes. The proposed image sensor has DOM pixels, a delay-based pulse generator,
and a readout circuitry. The delay-based pulse generator in combination with an in-pixel logic allows us to create and to
provide a short gating clock to the pixel array. A prototype time-resolved CMOS image sensor with the proposed pixel is
designed and implemented using 0.11um CMOS image sensor technology. The image array has 30(Vertical) x
128(Memory length) pixels with the pixel pitch of 22.4um. .
This paper presents a new ToF measurement technique using an impulse photocurrent response. In the proposed technique, a laser with a short pulse width for light source, which can be regarded as an impulse input for a detector. As a result, the range calculation is determined only by photocurrent response of the detector. A test chip fabricated in a 0.11um CIS technology employs a draining-only modulation pixel, which enables a high speed charge modulation. The measurable range measured to be 50 mm within nonlinear error of 5% and the average range resolution of 0.21 mm is achieved.
KEYWORDS: Cadmium sulfide, Image sensors, Video, Digital electronics, Data conversion, Analog electronics, Digital signal processing, Signal processing, CMOS sensors, Copper indium disulfide
We have developed a CMOS image sensor with 33 million pixels and 120 frames per second (fps) for Super Hi-Vision (SHV:8K version of UHDTV). There is a way to reduce the fixed pattern noise (FPN) caused in CMOS image sensors by using digital correlated double sampling (digital CDS), but digital CDS methods need high-speed analog-to-digital conversion and are not applicable to conventional UHDTV image sensors due to their speed limit. Our image sensor, on the other hand, has a very fast analog-to-digital converter (ADC) using “two-stage cyclic ADC” architecture that is capable of being driven at 120-fps, which is double the normal frame rate for TV. In this experiment, we performed experimental digital CDS using the high-frame rate UHDTV image sensor. By reading the same row twice at 120-fps and subtracting dark pixel signals from accumulated pixel signals, we obtained a 60-fps equivalent video signal with digital noise reduction. The results showed that the VFPN was effectively reduced from 24.25 e-rms to 0.43 e-rms.
This paper presents new structure and method of charge modulation for CMOS ToF range image sensors using pinned
photodiodes. Proposed pixel structure, the draining only modulator (DOM), allows us to achieve high-speed charge
transfer by generating lateral electric field from the pinned photo-diode (PPD) to the pinned storage-diode (PSD).
Generated electrons by PPD are transferred to the PSD or drained off through the charge draining gate (TXD). This
structure realizes trapping-less charge transfer from the PPD to PSD. To accelerate the speed of charge transfer, the
generation of high lateral electric field is necessary. To generate the electric field, the width of the PPD is changed along
the direction of the charge transfer.
The PPD is formed by the p+ and n layer on the p-substrate. The PSD is created by doping another n type layer for
higher impurity concentration than that of the n layer in the PPD. This creates the potential difference between the PPD
and PSD. Another p layer underneath the n-layer of the PSD is created for preventing the injection of unwanted carrier
from the substrate to the PSD.
The range is calculated with signals in the three consecutive sub-frames; one for delay sensitive charge by setting the
light pulse timing at the edge of TXD pulse, another for delay independent charge by setting the light pulse timing during
the charge transfer, and the other for ambient light charge by setting the light pulse timing during the charge draining.
To increase the photo sensitivity while realizing high-speed charge transfer, the pixel consists of 16 sub-pixels and a
source follower amplifier. The outputs of 16 sub-pixels are connected to a charge sensing node which has MOS capacitor
for increasing well capacity. The pixel array has 313(Row) x 240(Column) pixels and the pixel pitch is 22.4μm. A ToF
range imager prototype using the DOM pixels is designed and implemented with 0.11um CMOS image sensor process.
The accumulated signal intensity in the PSD as a function of the TXD gate voltage is measured. The ratio of the signal
for the TXD off to the signal for the TXD on is 33:1. The response of the pixel output as a function of the light pulse
delay has also been measured.
A high speed Lateral Electric Field Modulator (LEFM) and lock-in pixels amplifiers for stimulated Raman
scattering (SRS)imager is presented. Since the generated signal from the SRS process is very small compared to
the offset signal, a technique suitable for extracting and amplifying the SRS signal is needed. The offset can be
canceled by tuning the phase delay between the demodulated pixel output signal and the sampling clock. The
small SRS signal in large offset is amplified by the differential integration. The proposed technique has been
investigated with an implementation of 64x8 pixels array using a pinned photodiode LEFM an lock-in pixels
amplifiers. Very small signal can be extracted from large offset signal. A ratio of the detected small SRS to
offset signal of less 10-5 is achieved.
Multi-beam laser scanning confocal microscopy with a 256 × 256-pixel custom CMOS imager performing focal-plane
pinhole effect, in which any rotating disk is not required, is demonstrated. A specimen is illuminated by 32 × 32
diffraction limited light spots whose wavelength and pitch are 532nm and 8.4 μm, respectively. The spot array is
generated by a microlens array, which is scanned by two-dimensional piezo actuator according to the scanning of the
image sensor. The frame rate of the prototype is 0.17 Hz, which is limited by the actuator. The confocal effect has been
confirmed by comparing the axial resolution in the confocal imaging mode with that of the normal imaging mode. The
axial resolution in the confocal mode measured by the full width at half maximum (FWHM) for a planar mirror was 8.9
μm, which is showed that the confocality has been achieved with the proposed CMOS image sensor. The focal-plane
pinhole effect in the confocal microscopy with the proposed CMOS imager has been demonstrated at low frame rate. An
improvement of the scanning speed and a CMOS imager with photo-sensitivity modulation pixels suitable for high-speed
scanning are also discussed.
A CMOS imager for confocal multi-beam scanning microscopy, where the pixel itself works as a pinhole, is proposed.
This CMOS imager is suitable for building compact, low-power, and confocal microscopes because the complex Nipkow
disk with a precisely aligned pinhole array can be omitted. The CMOS imager is composed of an array of sub-imagers,
and can detect multiple beams at the same time. To achieve a focal-plane pinhole effect, only one pixel in each subimager,
which is at the conjugate position of a light spot, accumulates the photocurrent, and the other pixels are unread.
This operation is achieved by 2-dimensional vertical and horizontal shift registers. The proposed CMOS imager for the
confocal multi-beam scanning microscope system was fabricated in 0.18-μm standard CMOS technology with a pinned
photodiode option. The total area of the chip is 5.0mm × 5.0mm. The number of effective pixels is 256(Horizontal) ×
256(Vertical). The pixel array consists of 32(H) × 32(V) sub-imagers each of which has 8(H) × 8(V) pixels. The pixel is
an ordinary 4-transistor active pixel sensor using a pinned photodiode and the pixel size is 7.5μm × 7.5μm with a fillfactor
of 45%. The basic operations such as normal image acquisition and selective pixel readout were experimentally
confirmed. The sensitivity and the pixel conversion gain were 25.9 ke-/lx•sec and 70 μV/e- respectively.
A deep-focus three-dimensional endoscope based on a compact compound-eye camera called TOMBO (thin observation
module by bound optics) with polarization filters and polarized illuminations is presented. TOMBO is a very compact
multi-camera system, which is composed of a single image sensor, a lens array, and a crosstalk barrier. Features of
TOMBO are compactness of the camera system, and additional functionality achieved by attaching optical filters to
lenses. In this paper, to enhance surface or deep structures of biological tissues selectively, polarization filters, which are
parallel and vertical to the polarized illumination, respectively, are attached to a part of lenses. To achieve extended
depth of focus, a wavefront coding (WFC) technique based on the spherical aberration is introduced. A prototype
TOMBO with 3x3 lenses and a 2.2-μm-pixel color CMOS image sensor was fabricated. Depth estimation and superresolution
with the WFC technique are demonstrated. Enhancement of surface or deep structures is also verified
theoretically and experimentally.
Fluorescence lifetime imaging is becoming a powerful tool in biology. A charge-domain CMOS Fluorescence Lifetime
Imaging Microscopy (FLIM) chip using a pinned photo diode (PPD) and the pinned storage diode (PSD) with different
depth of potential wells has been previously developed by the authors. However, a transfer gate between PPD and PSD
causes charge transfer noise due to traps at the channel surface. This paper presents a time-resolved CMOS image sensor
with draining only modulation pixels for fluorescence lifetime imaging, which removes the transfer gate between PPD and
PSD. The time windowing is done by draining with a draining gate only, which is attached along the carrier path from
PPD to PSD. This allows us to realize a trapping less charge transfer between PPD and PSD, leading to a very low-noise
time-resolved signal detection. A video-rate CMOS FLIM chip has been fabricated using 0.18μm standard CMOS pinned
diode image sensor process. The pixel consists of a PPD, a PSD, a charge draining gate (TD), a readout transfer gate (TX)
between the PSD and the floating diffusion (FD), a reset transistor and a source follower amplifier transistor. The pixel
array has 200(Row) x 256(Column) pixels and the pixel pitch is 7.5μm. Fundamental characteristics of the implemented
CMOS FLIM chip are measured. The signal intensity of the PSD as a function of the TD gate voltage is also measured.
The ratio of the signal for the TD off to the signal for the TD on is 212 : 1.
This paper presents a structure and method of range calculation for CMOS time-of-flight(TOF) range image
sensors using pinned photodiodes. In the proposed method, a LED light with short pulse width and small duty
ratio irradiates the objects and a back-reflected light is received by the CMOS TOF range imager.Each pixel
has a pinned photodiode optimized for high speed charge transfer and unwanted charge draining. In TOF range
image sensors, high speed charge transfer from the light receiving part to a charge accumulator is essential.It
was found that the fastest charge transfer can be realized when the lateral electric field along the axis of charge
transfer is constant and this conditon is met when the shape of the diode exactly follows the relationship between
the fully-depleted potential and width. A TOF range imager prototype is designed and implemented with 0.18um
CMOS image sensor technology with pinned photodiode 4transistor(T) pixels. The measurement results show
that the charge transfer time is a few ns from the pinned photodiode to a charge accumulator.
A time correlation (TC) image sensor is a device that produces 3-phase time-correlated signals between the incident
light intensity and three reference signals. A conventional implementation of the TC image sensor using a standard
CMOS technology works at low frequency and with low sensitivity. In order to achieve higher modulation frequency and
high sensitivity, the TC image sensor with a dual potential structure using a pinned diode is proposed. The dual potential
structure is created by changing the impurity doping concentration in the two different potential regions. In this structure,
high-frequency modulation can be achieved, while maintaining a sufficient light receiving area. A prototype TC image
sensor with 366×390pixels is implemented with 0.18-μm 1P4M CMOS image sensor technology. Each pixel with the
size of 12μm×12μm has one pinned photodiode with the dual potential structure, 12 transistors and 3capacitors to
implement three-parallel-output active pixel circuits. A fundamental operation of the implemented TC sensor is
demonstrated.
A thermal noise calculation model of high-gain switched-capacitor column noise cancellers for CMOS image sensors is presented. In the high-gain noise canceller with a single noise cancelling stage, the reset noise of the readout circuits dominates the noise at high gain. Using the double-stage architecture using a switched-capacitor gain stage and a sample-and-hold stage using two sampling capacitors, the reset noise of the gain stage can be cancelled. The resulting input referred thermal noise power of high-gain double-stage switched-capacitor noise canceller is revealed to be proportional to (g_a/g_s)/GC_L where g_a, G and C_L are the transconductance, gain and output capacitance of the amplifier, respectively, and g_s is the output conductance of an in-pixel source follower. An important contribution of the proposed noise calculation formula is the inclusion of the influence of the transconductance ratio of the amplifier to that of the source follower. For low-noise design, it is important that the transconductance of the amplifier used in the noise canceller is minimized under the condition of meeting the required response time of the switched capacitor amplifier which is inversely proportional to the cutoff angular frequency.
This paper presents a dynamic range expansion technique of CMOS image sensors with dual charge storage in a pixel
and multiple exposures. Each pixel contains two photodiodes, PD1 and PD2 whose sensitivity can be set independently
by the accumulation time. The difference of charge accumulation time in both photodiode can be manipulated to expand
the dynamic range of the sensor. It allows flexible control of the dynamic range since the accumulation time in PD2 is
adjustable. The multiple exposure technique used in the sensor reduces the motion blur in the synthesized wide dynamic
range image when capturing fast-moving objects. It also reduces the signal-to-nose ratio dip at the switching point of the
PD1 signal to the PD2 signals in the synthesized wide dynamic range image. A wide dynamic range camera with
320x240 pixels image sensor has been tested. It is found that the sampling of 4 times for the short accumulation time
signals is sufficient for the reduction of motion blur in the synthesized wide dynamic range image, and the signal-to-noise
ratio dip at the switching point of the PD1 signal to the PD2 signal is improved by 6 dB using 4 short-time
exposures.
An ultra wide dynamic range (WDR) CMOS image sensor (CIS) and the details of evaluation are presented. The proposed signal readout technique of extremely short accumulation (ESA) enables the dynamic range of image sensor to be expanded up to 146dB. Including the ESA signals, total of 4 different accumulation time signals are read out in one frame period based on burst readout technique. To achieve the high-speed signal readout required for the multiple exposure signals, column parallel A/D converters are integrated at the upper and lower sides of pixel arrays. The improved 12-bits cyclic ADCs with a built-in correlated double sampling (CDS) circuit has the differential non-linearity (DNL) of ±0.3LSB.
3-D imaging systems can be used in a variety of applications such as in automobile, medicine, robot vision systems, security and so on. Recently many kinds of range finding methods have been proposed for 3-D imaging systems. This paper presents a new type of CMOS range image sensor based on the Time-of-Flight (TOF)principle with a spatial resolution of 336 × 252 (QVGA) and pixels of 15 × 15 μm2 size. A pixel structure of the sensor consists of single layer polysilicon gates on thick field oxide and has a function of background light induced charge reduction. The chip was fabricated in a 0.35 μm standard CMOS process with two poly and three metal layers. The presented sensor achieves a minimum range resolution of 2.8cm at framerate of 30fps and the resolution is improved to 4.2mm for 10 frames averaging, which corresponds to 3fps.
This paper presents a high-speed CMOS image sensor whose frame rate exceeds 2000 frames/sec (fps). The pixel includes a photodiode, a charge-transfer amplifier, and circuitry for correlated double sampling (CDS) and global electronic shuttering. Reset noise, which is the major random noise factor, is reduced by the CDS combined with the charge-transfer amplifier. The total number of devices in the pixel is 11 transistors and 2 MOS capacitors. Test circuits were fabricated using the 0.25 um CMOS process. The sensitivity of the 20 x 20 um2 pixel using the floating diffusion capacitor of 6.2 fF and the photodiode area of 15 x 12.7 um^2 is 34 V/lux-sec. At 1000 fps, noise level is 2.43 mVrms (dark). The noise level and the sensitivity are greatly improved compared to the non-charge-transfer pixel without global shutter (3Tr-type) implemented with the same technology, and to a previous version of the APS with in-pixel CDS.
In this paper, we describe the design and implementation of a one-chip camera device for a capsule endoscope. This experimental chip integrates peripheral circuits required for the capsule endoscope and the wireless transmission function based on a data transmission method using human body conduction. The integrated functional blocks include an image array, a timing generator, a clock generator, a voltage regulator, a 10b cyclic A/D converter, and a BPSK modulator. It can be operated autonomously with 3 pins (VDD, GND, and DATAOUT). A prototype chip which has 320x240 effective pixels was fabricated using 0.25μm CMOS image sensor process and the autonomous imaging was demonstrated. The chip size is 4.84mmx4.34mm. With a 2.0 V power supply, the analog part consumes 950µW and the total power consumption at 6 fps (20MHz carrier frequency) is about 3mW.
In this paper, we propose 32 parallel image compression circuits for high-speed cameras. The proposed compression circuits are based on a 4 x 4-point 2-dimensional DCT using a DA method, zigzag scanning of 4 blocks of the 2-D DCT coefficients and a 1-dimensional Huffman coding. The compression engine is designed with FPGAs, and the hardware complexity is compared with JPEG algorithm. It is found that the proposed compression circuits require much less hardware, leading to a compact high-speed implementation of the image compression circuits using parallel processing architecture. The PSNR of the reconstructed image using the proposed encoding method is better than that of JPEG at the region of low compression ratio.
This paper presents a high-speed CMOS image sensor of whose frame rate exceeds 2000 frames/s. The pixel includes a photodiode, a charge-transfer amplifier, and circuitry for correlated double sampling (CDS) and global electronic shuttering. Reset noise, which is a major random noise factor, is greatly reduced by the CDS combined with the charge-transfer amplifier. The total number of devices in the pixel is 11 transistors and 2 MOS capacitors. Test circuits were fabricated using a 0.25μm CMOS process. The sensitivity of the 20 x 20μm2 pixel using the floating diffusion capacitor of 6.2fF and the photodiode area of 15 x 12.7μm2 is 34V/lux-sec. At 1000frames/sec, noise level is 2.43mVrms (dark). The noise level and the sensitivity are greatly improved compared with a 3Tr. type APS implemented with the same technology and a previous version of the APS with in-pixel CDS.
This paper presents a purely CMOS Active Pixel Sensor (APS) capable of time-of-flight (TOF) range imaging. The TOF sensor introduced is used to calculate range in the charge domain. To obtain high speed and highly efficient charge transfer that is important for TOF range imaging, a high gain inverting amplifier and two capacitors connected
alternatively to the feedback path are used. The high speed and highly efficient charge transfer using a high gain inverting amplifier in a negative feedback loop enables the TOF range imaging to be based on standard CMOS technology. Moreover, CMOS based amplifier circuits have matured and are relatively easy to design. The analysis of the APS together with simulation results suggests that the proposed technique can achieve a sufficient range resolution
of millimeter to centimeter depending on the maximum measured range.
This paper presents a method of low light imaging using an extremely small capacitor for charge detection in a CMOS image sensor and a high-precision low-noise analog-to-digital converter. A condition for photon counting is that the charge-to-voltage conversion gain is much higher than the root mean square (rms) random noise of the readout circuits. The other condition is that the quantization step of the A/D converter is chosen to be the same as the conversion gain or the amplified conversion gain if the pixel output is further amplified. Simulation results show that if the rms random noise is
reduced to one-sixth of the conversion gain, the 10 times digital integration without the noise increase is possible. This means that even if a very small charge detection capacitor and a relative small power supply voltage are used, a sufficient dynamic range can be achieved by the digital integration without noise increase.
In this article, we propose a method to extend the dynamic range of the CMOS image sensor to both high illumination and low illumination. A one-frame period is divided into a period of long accumulation for low illumination, and periods of short accumulation for high illumination. The sensor data accumulated for short time are read out several times, and all of data are added repeatedly in a processing unit integrated. The SNR dip at boundary of low illumination and high
illumination regions is reduced by the integration of the short accumulated signals. Because the proposed method is independent of the
type of pixel structure, the low-noise characteristics can be achieved, allowing to use, for example, 4-transistor APS with a pinned photo diode. If the ratio of the long accumulation time and the short accumulation time is 128 and the number of addition times is 8, the dynamic range is extended to 41.6dB and the SNR dip is -11 dB.
One of the important features in CMOS image sensors regarding high sensitivity is that the random readout noise can be better than that of the CCD, if the property of narrow noise bandwidth in CMOS active pixel sensors is effectively used. This is especially important for mega-pixel video-rate image sensors. To meet the requirement, the use of high-gain amplifier at the column of the CMOS imager is effective, because the noise due to wideband amplifier at the output of the image sensor can be relatively reduced. However, it has not been clarified how much the column amplifier can contribute to the noise reduction effect.
In this paper, we present a noise calculation model of a switched-capacitor type column amplifier. The total noise consists of a noise component due to the noise charge sampled and held at the charge summation node of the amplifier and transferred to the output, and a noise component directly fluctuates the S/H stage at the output of the column amplifier. The analytically calculated noise has well agreement with that of the simulation results using a circuit simulator.
In this paper, we propose a method of low-noise signal detection technique using frame oversampling and a CMOS image sensor with non-destructive high-speed readout mode. The technique enables the use of the high-gain column amplifier and the digital integration of signals without noise accumulation. The column amplifier is effective to reduce the noise due to the wideband amplifier and the quantization noises. The least square estimation of the noise using the intermediate non-destructive outputs further reduces the noise level. Simulation results show that the input referred noise can be reduced to a few electrons.
We present a packaged single-chip microsystem for the detection of organic vapors. The sensor is fabricated using a 0.8 micrometers CMOS IC process provided by AMS Austria Mikro Systeme. Volatile organic compounds are detected by measuring the capacitance change of three polymer coated interdigitated capacitors due to analyte absorption. To protect the read-out circuitry from the organic vapors, the device is packaged using flip-chip technology. This technology allows for openings in the ceramic substrate for the sensing capacitors while hermetically sealing the remaining chip area. Measurements for different volatile organic compounds and chemically sensitive polymer layers are presented. The packaged microsensor array is a first step towards the realization of a small, low cost electronic nose on a single chip.
Access to the requested content is limited to institutions that have purchased or subscribe to SPIE eBooks.
You are receiving this notice because your organization may not have SPIE eBooks access.*
*Shibboleth/Open Athens users─please
sign in
to access your institution's subscriptions.
To obtain this item, you may purchase the complete book in print or electronic format on
SPIE.org.
INSTITUTIONAL Select your institution to access the SPIE Digital Library.
PERSONAL Sign in with your SPIE account to access your personal subscriptions or to use specific features such as save to my library, sign up for alerts, save searches, etc.