In this paper the use of the EPE metric directly in the process optimization method for a DRAM use case has been researched. We show that EPE-aware optimization, using scanner dose and overlay control sub-recipes, is outperforming conventional optimization in terms of EPE Dies in Spec. Hence, it can be expected that also device yield can be improved by EPE-aware control.
All wafers moving through a microchip nanofabrication process pass through a lithographic apparatus for most, if not all, layers. With a lithographic apparatus providing a massive amount of data per wafer, this paper will outline how physicsbased models can be used to refine UVLS (ultraviolet level sensor) metrology into four unique inputs for use in a deep learning network. Due to the multi-dimensional cross correlation of our deep learning network, we then show that training to a sparse overlay layout with dense inputs results in a hyper dense overly signature. On a testing dataset blind to the training we show that the accuracy of the predictive computational overlay metrology can capture R2 up to 0.81 of the signature in overlay Y. As a real-world application, we outline how our predictive computational overlay metrology can then be used to designate which wafer combinations, coming from the TWINSCAN system, should have overlay measured with a YieldStar system for possible use with APC (advanced process control).
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