Dr. Samar K. Saha Profile

Dr. Samar K. Saha

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Publications (9)

Proceedings Article | 17 May 2005 Paper

An electrostatic analysis of subthreshold behavior in FINFET

Balasubramanian Murugan, Rama Venkat, Samar Saha

Proceedings Volume 5755, (2005) https://doi.org/10.1117/12.597698

KEYWORDS: Oxides, Field effect transistors, Doping, Silicon, Dielectrics, Germanium, Bismuth, Computer engineering

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Proceedings Article | 17 May 2005 Paper

Flash memory-cell characterization using two-transistor cell compact macro-model for system-on-chip design

Changyuan Chen, Samar Saha

Proceedings Volume 5755, (2005) https://doi.org/10.1117/12.601974

KEYWORDS: Instrument modeling, Data modeling, Transistors, Computer aided design, Solid modeling, Device simulation, Process modeling, System on a chip, Calibration, Measurement devices

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Proceedings Article | 10 July 2003 Paper

Technology CAD for integrated circuit fabrication technology development and technology transfer

Samar Saha

Proceedings Volume 5042, (2003) https://doi.org/10.1117/12.485267

KEYWORDS: Manufacturing, TCAD, Semiconducting wafers, Monte Carlo methods, Instrument modeling, Device simulation, Reverse modeling, Calibration, Process control, Computer simulations

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Proceedings Article | 10 July 2003 Paper

Device characteristics of sub-20-nm silicon nanotransistors

Samar Saha

Proceedings Volume 5042, (2003) https://doi.org/10.1117/12.485268

KEYWORDS: Silicon, Field effect transistors, Device simulation, Oxides, Doping, Resistance, Electrodes, Instrument modeling, Semiconductors

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Proceedings Article | 18 August 2000 Paper

Scaling considerations for MOSFET devices with 25-nm channel lengths

Samar Saha

Proceedings Volume 4181, (2000) https://doi.org/10.1117/12.395731

KEYWORDS: Optical alignment, Semiconducting wafers, Distortion, Overlay metrology, Silicon, Reticles, Mirrors, Oxides, Image processing, Field effect transistors

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Proceedings Article | 1 September 1999 Paper

Systematic methodology for optimizing the tradeoff of polysilicon depletion versus boron penetration in sub-0.18-um surface-channel PMOS devices

Gregory Scott, Samar Saha, Christopher Olsen, Faran Nouri, Jeffrey Lutze, Mark Rubin, Martin Manley

Proceedings Volume 3881, (1999) https://doi.org/10.1117/12.360543

KEYWORDS: Boron, Oxides, Diffusion, Doping, Transistors, Control systems, Interfaces, Etching, Measurement devices, CMOS technology

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Proceedings Article | 1 September 1999 Paper

Estimation of quantum mechanical and polysilicon depletion effects for ultrathin silicon dioxide gate dielectric

G. Srinivasan, Samar Saha, G. Rezvani

Proceedings Volume 3881, (1999) https://doi.org/10.1117/12.360549

KEYWORDS: Oxides, Data modeling, Silicon, Dielectrics, Field effect transistors, Quantization, CMOS technology, Computer simulations, Instrument modeling, Silica

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Proceedings Article | 1 September 1999 Paper

Drain profile engineering for MOSFET devices with channel lengths below 100 nm

Samar Saha

Proceedings Volume 3881, (1999) https://doi.org/10.1117/12.360553

KEYWORDS: Field effect transistors, CMOS technology, Doping, Device simulation, Control systems, Resistance, Instrument modeling, Performance modeling, Very large scale integration, Semiconductors

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Proceedings Article | 4 September 1998 Paper

Optimized shallow trench isolation for sub-0.18-um ASIC technologies

Faran Nouri, Olivier Laparra, Harlan Sur, Samar Saha, Dipankar Pramanik, Martin Manley

Proceedings Volume 3506, (1998) https://doi.org/10.1117/12.323962

KEYWORDS: Oxides, Chemical mechanical planarization, Silicon, Semiconducting wafers, Etching, Diodes, Transistors, Polishing, Plasma, Oxidation

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Showing 5 of 9 publications

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