CD SEM’s used for CD Metrology in semiconductor fabs rely upon secondary electron emission to indirectly image features on process wafers. The use of secondary electrons by current CD SEM technology limits the resolution of this metrology and hinders its ability to meet future requirements. An idea that has garnered some interest from both the research and commercial sectors is to use backscattered, or primary, electrons with very low energy losses to image patterned features directly. Such a device would operate with acceleration (and landing) potentials in the range of 50 keV-200 keV. One concern is whether the high energy incident electrons will damage active devices. It has been hypothesized that the substrate’s reduced stopping power for high energy electrons will result in the majority of the electron energy being deposited far below the device structures. We have explored the issue of device damage from high energy and high dose incident electrons and find that this technique results in unacceptable transistor degradation at all of the doses and landing energies explored. We present our findings in this paper.
One of the many technology decisions facing the semiconductor industry for the 45 nm node (and beyond) is the selection of the best critical dimension (CD) metrology equipment to meet the needs of process equipment suppliers and semiconductor manufacturers. In an effort to address this need we fabricated advanced metrology structures using the Nanowriter e-beam writing tool at the Center for X-Ray Optics (CXRO) at Lawrence Berkeley National Laboratory. The structures include lines and holes both in resist and etched into substrates. The smallest isolated CDs are 16 nm, while the smallest holes are less than 50nm. We used these samples to characterize a variety of metrology technologies. In this paper we discuss the capability of those technologies to measure structures having dimensions representative of the 45 nm and 32 nm nodes.
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