As we strive toward smaller and smaller pitches to enable device scaling, thorough defect characterization at wafer scale continues its importance during the early phases of process optimization. In this paper, we describe experiments and show characterization results for capturing stochastic defects across various test structures of 28 nm pitch devices that have been patterned using single exposure EUV lithography. The objective of this work is to quantify detection sensitivity of critical defect types on multiple test structures, and study wafer and die level signatures for some of the types. We will employ various, complementary optical and e-beam inspection and review techniques. Further, new methods to increase sensitivity of optical inspection after litho are also discussed.
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