The rapid development of very-large format infrared detector arrays has challenged the IR scene projector community
to also develop larger-format infrared emitter arrays to support the testing of systems incorporating these detectors.
In addition to larger formats, many scene projector users require much higher simulated temperatures than can be
generated with current technology in order to fully evaluate the performance of their systems and associated processing
algorithms.
Under the Ultra High Temperature (UHT) development program, Santa Barbara Infrared Inc. (SBIR) is developing a
new infrared scene projector architecture capable of producing both very large format (>1024 x 1024) resistive emitter
arrays and improved emitter pixel technology capable of simulating very high apparent temperatures. During earlier
phases of the program, SBIR demonstrated materials with MWIR apparent temperatures in excess of 1400 K. New
emitter materials have subsequently been selected to produce pixels that achieve even higher apparent temperatures.
Test results from pixels fabricated using the new material set will be presented and discussed. A 'scalable' Read In
Integrated Circuit (RIIC) is also being developed under the same UHT program to drive the high temperature pixels.
This RIIC will utilize through-silicon via (TSV) and Quilt Packaging (QP) technologies to allow seamless tiling of
multiple chips to fabricate very large arrays, and thus overcome the yield limitations inherent in large-scale integrated
circuits. Results of design verification testing of the completed RIIC will be presented and discussed.
The rapid development of very-large format infrared detector arrays has challenged the IR scene projector community to develop correspondingly larger-format infrared emitter arrays to support the testing needs of systems incorporating these detectors. As with most integrated circuits, fabrication yields for the read-in integrated circuit (RIIC) that drives the emitter pixel array are expected to drop dramatically with increasing size, making monolithic RIICs larger than the current 1024x1024 format impractical and unaffordable. Additionally, many scene projector users require much higher simulated temperatures than current technology can generate to fully evaluate the performance of their systems and associated processing algorithms. Under the Ultra High Temperature (UHT) development program, Santa Barbara Infrared Inc. (SBIR) is developing a new infrared scene projector architecture capable of producing both very large format (>1024x1024) resistive emitter arrays and improved emitter pixel technology capable of simulating very high apparent temperatures. During an earlier phase of the program, SBIR demonstrated materials with MWIR apparent temperatures in excess of 1000K. New emitter materials have subsequently been selected to produce pixels that achieve even higher apparent temperatures. Test results from pixels fabricated using the new material set will be presented and discussed. Also in development under the same UHT program is a 'scalable' RIIC that will be used to drive the high temperature pixels. This RIIC will utilize through-silicon vias (TSVs) and quilt packaging (QP) technologies to allow seamless tiling of multiple chips to fabricate very large arrays, and thus overcome the inherent yield limitations of very-large-scale integrated circuits. Current status of the RIIC development effort will also be presented.
High pixel temperatures for IR scene projector arrays face materials challenges of oxidation, diffusion, and recrystallization. For cost effective development of new high-temperature materials, we have designed and fabricated simplified pixels for testing. These consist of resistive elements, traces, and bond pads sandwiched between dielectric layers on Si wafers. Processing involves a pad exposure etch, a pixel outline etch, and an undercut etch to thermally isolate the resistive element from the substrate. Test pixels were successfully fabricated by electron-beam lithography using a combination of wet and dry etching.
To meet the needs of high fidelity infrared sensors, under the Ultra High Temperature (UHT) development program, Santa Barbara Infrared Inc. (SBIR) has developed new infrared emitter materials capable of achieving extremely high temperatures. The current state of the art arrays based on the MIRAGE-XL generation of scene projectors is capable of producing imagery with mid-wave infrared (MWIR) apparent temperatures up to 700K with response times of 5 ms. The Test Resource Management Center (TRMC) Test and Evaluation/Science and Technology (TandE/SandT) Program through the U.S. Army Program Executive Office for Simulation, Training and Instrumentations (PEO STRI) has contracted with SBIR and its partners to develop a new resistive array based on these new materials, using a high current Read-In Integrated Circuit (RIIC) capable of achieving higher temperatures as well as faster frame rates. The status of that development will be detailed within this paper, including performance data from prototype pixels.
Several new technologies have been developed over recent years that make a fundamental change in the scene projection for infrared hardware in the loop test. Namely many of the innovations are in Read In Integrated Circuit (RIIC) architecture, which can lead to an operational and cost effective solution for producing large emitter arrays based on the assembly of smaller sub-arrays. Array sizes of 2048x2048 and larger are required to meet the high fidelity test needs of today’s modern infrared sensors. The Test Resource Management Center (TRMC) Test and Evaluation/Science and Technology (T and E/S and T) Program through the U.S. Army Program Executive Office for Simulation, Training and Instrumentations (PEO STRI) has contracted with SBIR and its partners to investigate integrating new technologies in order to achieve array sizes much larger than are available today. SBIR and its partners have undertaken several proof-of-concept experiments that provide the groundwork for producing a tiled emitter array. Herein we will report on the results of these experiments, including the demonstration of edge connections formed between different ICs with a gap of less than 10µm.
The use of 3D integration technology in focal plane array imaging devices has been shown to increase imaging
capability while simultaneously decreasing device area and power consumption, as compared to analogous 2D designs.
A key enabling technology for 3D integration is the use of high density metal-metal bonding to form pixel-level
interconnects between device layers. In this paper, we review recent progress in high density, sub-10 μm pitch
interconnect bonding for 3D integration of imaging systems. Specifically, we will present results from successful
demonstrations of the use of Cu microbumps for the interconnection of 5 μm pitch 640×512 and 1280×1024 arrays.
Operability of the arrays of bonded interconnects in two-layer silicon die stacks was greater than 99.99% with good
electrical isolation between bonds.
The DRS Tamarisk® 320 camera, introduced in 2011, is a low cost commercial camera based on the 17 µm pixel pitch 320×240 VOx microbolometer technology. A higher resolution 17 µm pixel pitch 640×480 Tamarisk®640 has also been developed and is now in production serving the commercial markets. Recently, under the DARPA sponsored Low Cost Thermal Imager-Manufacturing (LCTI-M) program and internal project, DRS is leading a team of industrial experts from FiveFocal, RTI International and MEMSCAP to develop a small form factor uncooled infrared camera for the military and commercial markets. The objective of the DARPA LCTI-M program is to develop a low SWaP camera (<3.5 cm3 in volume and <500 mW in power consumption) that costs less than US $500 based on a 10,000 units per month production rate. To meet this challenge, DRS is developing several innovative technologies including a small pixel pitch 640×512 VOx uncooled detector, an advanced digital ROIC and low power miniature camera electronics. In addition, DRS and its partners are developing innovative manufacturing processes to reduce production cycle time and costs including wafer scale optic and vacuum packaging manufacturing and a 3-dimensional integrated camera assembly. This paper provides an overview of the DRS Tamarisk® project and LCTI-M related uncooled technology development activities. Highlights of recent progress and challenges will also be discussed. It should be noted that BAE Systems and Raytheon Vision Systems are also participants of the DARPA LCTI-M program.
The Ultra High Temperature (UHT) development program will develop, package, and deliver high temperature scene
projectors for the U.S. Government. The Infrared Scene Projector (IRSP) systems goals are to be capable of extremely
high temperatures, in excess of 2000K, as well as fast frame rates, 500 Hz, and 2 ms rise times. The current status of the
pixel design will be discussed with an emphasis on the models developed to facilitate these designs and estimate
performance prior to fabrication.
The demand for more complex and multifunctional microsystems with enhanced performance characteristics for military
applications is driving the electronics industry toward the use of best-of-breed materials and device technologies. Threedimensional
(3-D) integration provides a way to build complex microsystems through bonding and interconnection of
individually optimized device layers without compromising system performance and fabrication yield. Bonding of
device layers can be achieved through polymer bonding or metal-metal interconnect bonding with a number of metalmetal
systems. RTI has been investigating and characterizing Cu-Cu and Cu/Sn-Cu processes for high density area array
imaging applications, demonstrating high yield bonding between sub-15 μm pads on large area array configurations.
This paper will review recent advances in the development of high yield, large area array metal-metal interconnects
which enable 3-D integration of heterogeneous materials (e.g. HgCdTe with silicon) and heterogeneous fabrication
processes (e.g. infrared emitters or microbolometers with ICs) for imaging and scene projector applications.
MIRAGE WF is the latest high definition version of the MIRAGE infrared scene projector product line from Santa
Barbara Infrared Inc. (SBIR). MIRAGE WF is being developed under the Wide Format Resistive Array (WFRA)
program. The WFRA development is one of several efforts within the Infrared Sensor Simulator - Preplanned Product
Improvement (IRSS P3I) umbrella funded by the Central Test and Evaluation Investment Program (CTEIP) and led by
the US Navy at Patuxent River, MD. Three MIRAGE WF infrared scene projection systems are being delivered as part
of the WFRA program. The main differences between the MIRAGE XL (1024x1024) and MIRAGE WF are a 1536x768
emitter array and 100Hz true raster capability. The key emitter requirements that have been measured and will be
discussed include: Operability, Maximum Apparent Temperature, Rise Time and Array Uniformity. Key System
specifications are: 1536x768 pixels, maximum apparent temperature of 600K, maximum frame rate of 100Hz, raster and
snap shot updating, radiance rise and fall time less than 5 ms and windowed mode (1024x768) operation at up to 200 Hz.
Santa Barbara InfraRed (SBIR) is producing high performance 1,024 x 1,024 Large Format Resistive emitter Arrays
(LFRA) for use in the next generation of IR Scene Projectors (IRSPs). The demands of testing modern infrared imaging
systems require higher temperatures and faster frame rates. New emitter pixel designs, rise time enhancement techniques
and a new process for annealing arrays are being applied to continually improve performance. This paper will discuss the
advances in pixel design, rise time enhancement techniques and also the process by which arrays are annealed. Test
results will be discussed highlighting improvements in rise time, uniformity and reduced numbers of defective pixels.
Military applications demand more and more complex, multifunctional microsystems with performance characteristics which can only be achieved by using best-of-breed materials and device technologies for the microsystem components. Three-dimensional (3-D) integration of separate, individually complete device layers provides a way to build complex microsystems without compromising the system performance and fabrication yield. In the 3-D integration approach, each device layer is fabricated separately using optimized materials and processes. The layers are stacked and interconnected through area array vertical interconnects with lengths on the order of just tens of microns. This paper will review recent advances in development of 3-D integration technologies with focus on those which enable integration of heterogeneous materials (e.g. HgCdTe FPAs with silicon ROICs) or heterogeneous fabrication processes (e.g. resistive IR emitters with RIICs).
We have evaluated several methods for generating multi-color emission for IR scene projector applications. The baseline requirements we employed were the ability to simulate color temperatures in the range 300-3000 K, minimum radiance levels consistent with existing IR sensor requirements, 1000 Hz frame rates and manufacturability. The analysis led us to down select two independent approaches that are capable of meeting HWIL multicolor requirements. We describe and discuss each of the approaches, their expected performance as well as their limitations.
KEYWORDS: Cryogenics, Analog electronics, Electronics, Prototyping, Packaging, Interfaces, Mid-IR, Digital electronics, Microelectromechanical systems, Temperature metrology
SBIR has completed the development of the first lot of OASIS emitter arrays and custom packaging for cryogenic IR scene projection applications. OASIS performance requirements include a maximum MWIR apparent temperature of greater than 600 K, with 10-90% radiance rise time of less than 6.5 ms. Four (4) arrays have been packaged, integrated, tested and delivered.
This paper will report on the first measurements taken of the OASIS resistive emitter arrays at both ambient and cryogenic temperatures. This paper will also provide a discussion of the OASIS cryogenic projector/electronics module (Cryo-PEM) design. We will also describe the novel thermal design employed within the array package and Cryo-PEM assemblies, which allows OASIS to produce radiometrically accurate imagery with reduced thermal lag/gradient artifacts compared to legacy Honeywell cryogenic IRSP assemblies. As OASIS supports both analog and digital input, we will discuss the differences between the two modes in terms of system integration, support electronics and overall array performance.
SBIR has passed the midpoint of delivering ten 1024x1024 IR Scene Projector Systems (IRSPs) to the Government. Six systems have been installed at Redstone Technical Test Center (RTTC), Patuxent River, and Edwards Air Force Base. Four more systems are in production and will be shipped by the end of this year. The commercial name of the LFRA IRSP is Mirage XL. This ground breaking projector technology is being leveraged on the Wide Format Resistive Array (WFRA) program and on the Mirage II product. The WFRA IRSP, also known as Mirage HD, features an even larger 1536x768 emitter array and will be in system integration by the end of the year. Mirage II, which also leverages LFRA, is being readied as the next generation 512x512 projector system.
Additional signal processing capabilities have been installed in the LFRA systems. Each system now has full Translation/Rotation Processing (TRP) capability. Systems also have image convolution and 400Hz 1024x512 windowing capabilities.
SBIR has completed design and development of prototype emitter arrays and is completing custom cryogenic vacuum device packaging and support electronics for the Optimized Arrays for Space-background Infrared Simulation (OASIS) program. The OASIS array is a 512 x 512 device featuring high output dynamic range, a selectable analog/digital scene data interface, and the capability to operate from cryogenic to ambient substrate temperatures - thereby providing an enabling technology for projection of simulated radiance of space-background scenes. Prototype emitter production has been completed at RTI International in support of initial deliveries. The OASIS array package incorporates novel electrical bussing schemes optimized for the OASIS RIIC and a modular architecture to allow user re-configuration of both window and emitter shield. The OASIS package leverages LFRA operation features, and supports both ambient and cryogenic chamber-based operation with a minimum of mechanical and electrical re-configuration. The OASIS close support electronics (CSE) supports both analog and digital input data modes, while providing easy electronic connection between arrays installed in the cryogenic chamber and the external control and scene-generation systems. We present a technical overview of the OASIS array/package and CSE designs, and will report on measured radiometric performance from prototype OASIS arrays.
SBIR has completed development of the Large Format Resistive Array (LFRA) Infrared Scene Projector (IRSP) and shipped the first production system. Nine more systems are in production and will be shipped to several US Government customers on approximately six week centers. The commercial name of the LFRA IRSP is Mirage XL. System performance meets a broad range of program requirements and SBIR has been extremely successful in producing this ground breaking projector. Tests performed on System #1 reveal broad compliance to the specification and, in particular, outstanding emitter array performance. Key emitter requirements that have been met or exceeded include Operability, Maximum Apparent Temperature, and Array Uniformity. Key System specifications are:
Large-format emitter array (1024x1024);
High maximum apparent temperature (>700K);
200 Hz full-frame operation;
400 Hz static window mode (1024x512);
Non Uniformity (uncorrected) <10%.
SBIR's family of MIRAGE infrared scene projection systems is undergoing significant growth and expansion. The first two lots of production IR emitters have completed fabrication at Microelectronics Center of North Carolina/Research and Development Institute (MCNC-RDI), and the next round(s) of emitter production has begun. These latest emitter arrays support programs such as Large Format Resistive Array (LFRA), Optimized Array for Space-based Infrared Simulation (OASIS), MIRAGE 1.5, and MIRAGE II. We present the latest performance data on emitters fabricated at MCNC-RDI, plus integrated system performance on recently completed IRSP systems. Teamed with FLIR Systems/Indigo Operations, SBIR and the Tri-Services IRSP Working Group have completed development of the CMOS Read-In Integrated Circuit (RIIC) portion of the Wide Format Resistive Array (WFRA) program-to extend LFRA performance to a 768 x 1536 "wide screen" projection configuration. WFRA RIIC architecture and performance is presented. Finally, we summarize development of the LFRA Digital Emitter Engine (DEE) and OASIS cryogenic package assemblies, the next-generation Command & Control Electronics (C&CE).
Santa Barbara Infrared's (SBIR) family of MIRAGE infrared scene projection systems is undergoing significant growth and expansion. The first lot of production IR emitters is in fabrication at Microelectronics Center of North Carolina/Research and Development Institute (MCNC-RDI), the state-of-the-art MEMS foundry and R&D center which completed prototype fabrication in early 2003. The latest emitter arrays are being produced in support of programs such as Large Format Resistive Array (LFRA) and MIRAGE 1.5, MIRAGE II, and OASIS. The goal of these new development programs is to increase maximum scene temperature, decrease radiance rise time, support cryogenic operation, and improve operability and yield. After having completed an extremely successful prototype run in 2003, SBIR and MCNC-RDI have implemented a variety of emitter process improvements aimed at maximizing performance and process yield. SBIR has also completed development and integration of the next-generation MIRAGE command and control electronics (C&CE), an upgraded calibration radiometry system (CRS), and has developed test equipment and facilities for use in MIRAGE device wafer probing, test, evaluation, diagnostic, and assembly processes. We present the latest emitter performance data, an overview of emitter foundry processing and packaging improvements, and an update on MIRAGE II, LFRA, and OASIS development programs.
SBIR's family of MIRAGE infrared scene projection systems is undergoing significant growth and expansion. SBIR has completed the transition of Honeywell's resistive emitter technology to MCNC Research and Development Institute (MCNC-RDI), and is preparing for first-lot production of IR emitters in support of ongoing programs. Development of MIRAGE resistive emitter-based products is underway in order to increase maximum scene temperature, decrease radiance rise time, and improve overall operation. The 1024 x 1024 Large Format Resistive Array (LFRA) Read-In Integrated Circuit (RIIC) has been fabricated and tested, with emitter fabrication to start in mid-2003. A next-generation MIRAGE II(512 x 512) RIIC is also ready for fabrication, in support of high-performance MIRAGE II 512 x 512 systems providing greater than 750 K MWIR apparent temperature, and less than 5 ms 10-90% MWIR radiance rise time. In support of these new technologies and products, SBIR has developed test equipment and facilities for use in next-generation MIRAGE device wafer probing, test, evaluation, diagnostic, and assembly processes.
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