Jason Mayer
at GLOBALFOUNDRIES Inc
SPIE Involvement:
Author
Publications (4)

Proceedings Article | 24 May 2004 Paper
Proceedings Volume 5375, (2004) https://doi.org/10.1117/12.538009
KEYWORDS: Scatterometry, Semiconducting wafers, Scatter measurement, Scanning electron microscopy, Critical dimension metrology, Metrology, Manufacturing, Electrodes, Data modeling, Capacitance

Proceedings Article | 2 June 2003 Paper
Proceedings Volume 5038, (2003) https://doi.org/10.1117/12.485033
KEYWORDS: Scanning electron microscopy, Semiconducting wafers, Critical dimension metrology, Metrology, Optical testing, Electron beams, Manufacturing, Tolerancing, Calibration, Process control

Proceedings Article | 2 June 2003 Paper
Jason Mayer, Kylee Huizenga, Eric Solecky, Charles Archie, G. Banke, Robert Cogley, Claudine Nathan, James Robert
Proceedings Volume 5038, (2003) https://doi.org/10.1117/12.485035
KEYWORDS: Semiconducting wafers, Line edge roughness, Atomic force microscopy, Scanning electron microscopy, Voltage controlled current source, Optical resolution, Manufacturing, Reticles, Edge roughness, Microelectronics

Proceedings Article | 16 July 2002 Paper
Proceedings Volume 4689, (2002) https://doi.org/10.1117/12.473486
KEYWORDS: Critical dimension metrology, Smoothing, Scanning electron microscopy, Etching, Signal to noise ratio, Semiconducting wafers, Standards development, Transistors, Finite element methods, Process control

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