A remote sensing image classification algorithm based on image activity measure is proposed, which is used for adaptive image compression applications. The image activity measure has been studied and the support vector machine(SVM) is introduced. Then, the relationship between the image activity measure and the distortion caused by quantization is discussed in our image compression experiments (JPEG2000, CCSDS and SPIHT). Another two image activity measures are proposed as well. Then a feature vector is constructed by image activity measures in order to describe the image compression features of different images. The test images are classified by support vector machine classifier. The effectiveness of the proposed algorithm has been tested using an image data set, which demonstrates the advantage of the proposed algorithm.
A multi-layer coding algorithm is proposed for grey image lossless compression. We transform the original image by a set of bases (e.g., wavelets, DCT, and gradient spaces). Then, the transformed image is split into a sub-image set with a binary tree. The set include two parts: major sub-images and minor sub-images, which are coded separately. Experimental results over a common dataset show that the proposed algorithm performs close to JPEG-LS in terms of bitrate. However, we can get a scalable image quality, which is similar to JPEG2000. A suboptimal compressed image can be obtained when the bitstream is truncated by unexpected factors. Our algorithm is quit suitable for image transmission, on internet or on satellites.
We present a novel high-throughput very large scale integration implementation for a lifting-based discrete wavelet transform (DWT). First, an efficient parallel processing technique using look-ahead pipelining is investigated for implementation of 1-D DWT; then the scalable design respectively for the 1-D architecture and 2-D architecture is introduced. The proposed designs indicate that the delay registers of the 1-D architecture and the line buffers of the 2-D architecture do not increase proportionally to the amount of parallelism exploited, which is very meaningful to control increase of cost for 2-D high-speed implementation. The proposed 2-D architecture could complete one level of the decomposition transform for an N×N frame of an image in approximately N×N/(4I×J) intraclock cycles, where the values of I and J could be set as arbitrary suitable positive integers. Compared with the previous similar methods, the proposed design could efficiently save hardware resources under the same throughput rate, and has more flexible scalability and simpler control complexity; thus, it could be an efficient alternative for high-speed applications.
The inherent speckle noise in synthetic aperture radar (SAR) images severely degrades the image interpretation and affects the follow-up image-processing tasks. Thus, speckle suppression is a critical step in SAR image preprocessing. We propose a novel locally adaptive speckle reduction algorithm based on Bayesian maximum a posteriori (MAP) estimation in wavelet domain. First, the presented method performs logarithmical transform to original speckled SAR image and an undecimated wavelet transform (UWT). The Rayleigh distribution is used to model the statistics of the speckle wavelet coefficients, and the Laplacian distribution models the statistics of wavelet coefficients due to signal. A Bayesian estimator with a closed-form solution is derived from MAP criterion estimation, and the resulting formula is proved to be equivalent to soft thresholding in nature, which makes our algorithm very simple. Furthermore, the parameters of the Laplacian model are estimated from the coefficients in a neighboring window, thus making the presented method spatially adaptive in the wavelet domain. Theoretical analysis and simulation experiment results show that the proposed method is simple and effective. It significantly improves the visual quality of the SAR images and yields better performance than spatial filterings and traditional wavelet despeckling algorithms.
MQ arithmetic coder has been adopted to achieve entropy coding in the latest image compression standard JPEG2000, which is a bit-level operation with intensive branch and feedback thus becomes a serious bottleneck of high speed JPEG2000. In this paper, an efficient implementation scheme for MQ coder was proposed, in which the renormalization process with BYTEOUT was performed in batch fashion instead of gradual iteration as introduced in JPEG2000. Experimental results have proved the validity of this method in decreasing computation complexity.
Three-dimensional (3-D) median filtering is very useful to eliminate speckle noise from a medical imaging source, such
as functional magnetic resonance imaging (fMRI) and ultrasonic imaging. 3-D median filtering is characterized by its
higher computation complexity. N3(N3-1)/2 comparison operations would be required for 3-D median filtering with
N×N×N window if the conventional bubble-sorting algorithm is adopted. In this paper, an efficient fast algorithm for
3-D median filtering was presented, which considerably reduced the computation complexity for extracting the median
of a 3-D data array. Compared to the state-of-the-art, the proposed method could reduce the computation complexity of
3-D median filtering by 33%. It results in efficiently reducing the system delay of the 3-D median filter by software
implementation, and the system cost and power consumption by hardware implementation.
Efficient line-based very large scale integration architectures for the 2-D discrete wavelet transform (DWT) based on a lifting scheme, using the 9/7 wavelet filters adopted in the JPEG 2000 proposal, are proposed. The embedded decimation technique based on folding and time multiplexing was exploited to optimize the architecture, which reduces the size of buffer memory required and the amount of RAM access, and hence the occupied area and power consumption of the devices. Using this technique, a single-input, single-output architecture (SISOA) and a two-input, two-output architecture (TITOA) are proposed. The presented SISOA is designed to generate one output per clock cycle; the TITOA is designed to generate two outputs per clock cycle with the same memory requirement as that for SISOA, where the four subband coefficients of the transformed signal are available interleaved. Because only one line of data is required at a time, a single-port memory can be used. Performance analysis and comparison results demonstrate that the proposed method is economical of hardware cost and computation time. The advantages of the design also include short output latency, simple data flow, regularity, and scalability, as well as suitability for VLSI implementation.
We describe a novel interpolation algorithm to find the optimal image intensity function generating an optimal gray-level estimation of interpolated pixels of digital images. The new approach is based on the proposed image block mapping method and least-square support vector machines (LSSVM) with Gaussian radial basis function (RBF) kernels. With the mapping technique, the interpolation procedure of the LSSVM is actually accomplished in the same input vector space. A number of different scale interpolation experiments are carried out. The experimental results demonstrate that the performance of the proposed algorithm is competitive with many other existing methods, such as cubic, spline, and linear methods. The peak signal-to-noise ratio of the image reconstructed by the proposed algorithm is higher than those obtained by the spline. And the estimated accuracy of the proposed algorithm is similar to that of the cubic algorithm, while the computational requirement is lower than the latter.
In this paper, an efficient VLSI architecture for biorthogonal 9/7 wavelet transform by lifting scheme is presented. The proposed architecture has many advantages including, symmetrical forward and inverse wavelet transform as a result of adopting pipeline parallel technique, as well as area and power efficient because of the decrease in the amount of memory required together with the reduction in the number of read/write accesses on account of using embedded boundary data-extension technique. We have developed a behavioral Verilog HDL model of the proposed architecture, which simulation results match exactly that of the Matlab code simulations. The design has been synthesized into XILINX xcv50e-cs144-8, and the estimated frequency is 100MHz.
A new general method of the automatic selection of guide star, which based on a new dynamic Visual Magnitude Threshold (VMT) hyper-plane and the Support Vector Machines (SVM), is introduced. The high dimensional nonlinear VMT plane can be easily obtained by using the SVM, then the guide star sets are generated by the SVM classifier. The experiment results demonstrate that the catalog obtained by the proposed algorithm has a lot of advantages including, fewer total numbers, smaller catalog size and better distribution uniformity.
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