Mr. Carlton Washburn Profile

Carlton Washburn

Technical Product Manager at Brewer Science Inc

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Publications (9)

Proceedings Article | 23 March 2012 Paper

EUV assist layers for use in multilayer processes

Tantiboro Ouattara, Carlton Washburn, Aline Collin, Vandana Krishnamurthy, Douglas Guerrero, Michael Weigand

Proceedings Volume 8322, 83222E (2012) https://doi.org/10.1117/12.916469

KEYWORDS: Etching, Extreme ultraviolet lithography, Photoresist materials, Lithography, Extreme ultraviolet, Oxygen, Polymers, System on a chip, Line edge roughness, Scanning electron microscopy

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Proceedings Article | 16 April 2011 Paper

Implementation of KrF DBARCs for implant applications on advanced lithography nodes

Joyce Lowes, Alice Guerrero, Michael Weigand, Carlton Washburn, Charlyn Stroud, Shalini Sharma, David Torres, Mark Slezak, Gary Dabbagh, Cherry Tang

Proceedings Volume 7972, 797227 (2011) https://doi.org/10.1117/12.879464

KEYWORDS: Picosecond phenomena, Photoresist materials, Lithography, Semiconducting wafers, Critical dimension metrology, Photoresist developing, Polymers, Silicon, Reflectivity, Photomasks

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Proceedings Article | 31 March 2010 Paper

Photoresist-induced development behavior in DBARCs

Jim Meador, Alice Guerrero, Joyce Lowes, Charlyn Stroud, Brandy Carr, Anwei Qin, Carlton Washburn, Ramil-Marcelo Mercado

Proceedings Volume 7639, 763926 (2010) https://doi.org/10.1117/12.846927

KEYWORDS: Lithography, Photoresist materials, Silicon, Photoresist developing, Diffusion, Polymers, Lithographic illumination, Scanning electron microscopy, Scanners, Photography

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Proceedings Article | 31 March 2010 Paper

Improving material-specific dispense processes for low-defect coatings

Brian Smith, Raul Ramirez, Jennifer Braggin, Aiwen Wu, Karl Anderson, John Berron, Nick Brakensiek, Carlton Washburn

Proceedings Volume 7639, 763929 (2010) https://doi.org/10.1117/12.846642

KEYWORDS: Semiconducting wafers, Particles, Liquids, Manufacturing, Materials processing, Data modeling, Lithography, Intelligence systems, Product engineering, Process engineering

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Proceedings Article | 30 March 2007 Paper

A novel approach to developer-soluble anti-reflective coatings for 248-nm lithography

Ramil-Marcelo Mercado, Joyce Lowes, Carlton Washburn, Douglas Guerrero

Proceedings Volume 6519, 65192X (2007) https://doi.org/10.1117/12.712313

KEYWORDS: Polymers, Lithography, Photoresist developing, Photoresist materials, Electroluminescence, Reflectivity, Antireflective coatings, Critical dimension metrology, Silicon, Light sources

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Proceedings Article | 11 April 2006 Paper

Wet-recess process optimization of a developer-soluble gap-fill material for planarization of trenches in trench-first dual damascene process

Carlton Washburn, Nick Brakensiek, Alice Guerrero, Kevin Edwards, Charlyn Stroud, Nicki Chapman

Proceedings Volume 6153, 61532K (2006) https://doi.org/10.1117/12.655734

KEYWORDS: Semiconducting wafers, Etching, Copper, Photoresist processing, Dielectrics, Semiconductor manufacturing, Coating, Silicon, Wet etching, Optical lithography

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Proceedings Article | 29 March 2006 Paper

Development of 193-nm wet BARCs for implant applications

Jim Meador, Carol Beaman, Joyce Lowes, Carlton Washburn, Ramil Mercado, Mariya Nagatkina, Charlyn Stroud

Proceedings Volume 6153, 61532P (2006) https://doi.org/10.1117/12.657597

KEYWORDS: Reflectivity, Photoresist materials, Silicon, Lithography, Polymers, Electroluminescence, Chemistry, Critical dimension metrology, Photoresist developing, Absorbance

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Proceedings Article | 14 May 2004 Paper

Developer-soluble gap fill materials for patterning metal trenches in via-first dual damascene process

Mandar Bhave, Kevin Edwards, Carlton Washburn, Satoshi Takei, Yasushi Sakaida, Yasuyuki Nakajima

Proceedings Volume 5376, (2004) https://doi.org/10.1117/12.534338

KEYWORDS: Semiconducting wafers, Etching, Lithography, Standards development, Reactive ion etching, Optical lithography, Metals, Polymers, Photoresist materials, Materials processing

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Proceedings Article | 14 May 2004 Paper

Wet-recess process optimization of a bottom antireflective coating for the via first dual damascene scheme

Nickolas Brakensiek, Brian Kidd, Carlton Washburn, Earnest Murphy

Proceedings Volume 5376, (2004) https://doi.org/10.1117/12.533817

KEYWORDS: Semiconducting wafers, Etching, Diffractive optical elements, Coating, Optical lithography, Thin film coatings, Bottom antireflective coatings, Manufacturing, Photoresist materials, Reactive ion etching

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The via-first process is unique by the fact that a material is needed to fill the vias to some arbitrary value, with little or no isolated-dense via bias so that the underlying layer underneath the via is protected from the trench etch step. Secondly, this material may have to coat over the surface of the wafer with some chosen thickness again with minimum or no bias to maximize the trench photolithography process window. Finally, the material must be easily removed from the via after the trench etch with no residue, crowning, or fencing. The ideal via fill material would be able to perform all the above listed parameters, but no perfect solution exists yet. The etchback process that is discussed herein, called the solvent etchback (SOLVE) process bypasses these lengthy modules, will fit within today’s manufacturing processes and will have little impact on throughput of the photobay coating tools. The process utilizes industry standard photoresists solvents such as PGMEA, Ethyl Lactate, PGME and existing solvent prewet dispense nozzles in the BARC coater module. Also, this process only requires one material that can both fill the via and act as a BARC during the trench photo step with a user defined thickness on top the wafer that will minimize light reflections coming from the substrate. The process flow for the SOLVE process is: 1. Coat a wafer with a thick BARC to planarize the wafer and minimize isolated-dense bias. 2. Bake the BARC so that it is partially crosslinked. 3. Apply a solvent to the wafer and etchback the BARC to a thickness that suits the trench photo step. 4. Bake the BARC to fully crosslink the BARC. Process variables that can have an affect on the SOLVE process are the softbake temperature and time to modify the BARC thickness on the wafer. Dispense parameters that will modify the post-etch uniformity of the wafer include the dispense time, dispense spin speed and the IDI M450 dispense pressure. The repeatability of the process can be modified by changing the solvent spin off speed and acceleration.

Showing 5 of 9 publications

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