Associative RAM-net memory neural target classifier

D. Kaur; D. L. Brownell

doi:10.1117/1.602019

1 July 1998 Associative RAM-net memory neural target classifier

D. Kaur, D. L. Brownell

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Optical Engineering, Vol. 37, Issue 7, (July 1998). https://doi.org/10.1117/1.602019

We propose a broad-based target classifier that recognizes a target on the principle of pattern matching based on associative memory, and can be implemented in hardware with standard complementary metal-oxide semiconductor (CMOS) cells. A major drawback in the field of neural networks is the inability to implement network designs in hardware inexpensively. Here we have designed an associative RAM-net memory neural classifier, which is based on the associative memory model of a winner-take-all classifier. In this model extensive use of ordinary random access memory is made. The benefit of this approach is that the entire architecture can be designed with current CMOS standard cells application-specific integrated circuit (ASIC) technologies as opposed to current analog very large scale integration (VLSI) approaches. Since RAM can be easily added using the standard cell ASIC approach, a low-cost implementation for a wide variety of neural classification problems is provided. The integration of all necessary features on a single chip results in an easily implementable, low-chip-count classification system. A full gate-level design of the architecture is created and simulated using the VHDL hardware programming language (Navabi, 1993; Mentor Graphics, 1992). The results are very encouraging, and warrant further research into various memory types and configurations.

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D. Kaur and D. L. Brownell "Associative RAM-net memory neural target classifier," Optical Engineering 37(7), (1 July 1998). https://doi.org/10.1117/1.602019

Published: 1 July 1998

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KEYWORDS

Clocks

Binary data

Content addressable memory

Neural networks

Optical engineering

Classification systems

Image classification

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