Python based high-level synthesis compiler

Radosław Cieszewski; Krzysztof Pozniak; Ryszard Romaniuk

doi:10.1117/12.2075988

16 December 2014 Python based high-level synthesis compiler

Radosław Cieszewski, Krzysztof Pozniak, Ryszard Romaniuk

Author Affiliations +

Proceedings Volume 9290, Photonics Applications in Astronomy, Communications, Industry, and High-Energy Physics Experiments 2014; 92903A (2014) https://doi.org/10.1117/12.2075988
Event: Symposium on Photonics Applications in Astronomy, Communications, Industry and High-Energy Physics Experiments, 2014, Warsaw, Poland

Abstract

This paper presents a python based High-Level synthesis (HLS) compiler. The compiler interprets an algorithmic description of a desired behavior written in Python and map it to VHDL. FPGA combines many benefits of both software and ASIC implementations. Like software, the mapped circuit is flexible, and can be reconfigured over the lifetime of the system. FPGAs therefore have the potential to achieve far greater performance than software as a result of bypassing the fetch-decode-execute operations of traditional processors, and possibly exploiting a greater level of parallelism. Creating parallel programs implemented in FPGAs is not trivial. This article describes design, implementation and first results of created Python based compiler.

Citation Download Citation

Radosław Cieszewski, Krzysztof Pozniak, and Ryszard Romaniuk "Python based high-level synthesis compiler", Proc. SPIE 9290, Photonics Applications in Astronomy, Communications, Industry, and High-Energy Physics Experiments 2014, 92903A (16 December 2014); https://doi.org/10.1117/12.2075988

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