Quantifying throughput improvements for electron-beam lithography using a suite of benchmark patterns

John G. Hartley; Nigel Crosland; Robert C. Dowling Jr.; Philip C. Hoyle; Andrew McClelland; Martin Turnidge; James H. Smith II

doi:10.1117/12.2011664

26 March 2013 Quantifying throughput improvements for electron-beam lithography using a suite of benchmark patterns

John G. Hartley, Nigel Crosland, Robert C. Dowling Jr., Philip C. Hoyle, Andrew McClelland, Martin Turnidge, James H. Smith II

Author Affiliations +

Proceedings Volume 8680, Alternative Lithographic Technologies V; 86800P (2013) https://doi.org/10.1117/12.2011664
Event: SPIE Advanced Lithography, 2013, San Jose, California, United States

Abstract

The Vistec VB300 Gaussian electron-beam lithography system at the College of Nanoscale Science and Engineering (CNSE) in Albany routinely exposes 300 mm wafers to meet the requirements of nano-patterning for metrology and process tool qualification. CNSE and Vistec are partners in a continuous throughput improvement program. The first stage of this program has recently been implemented on CNSE’s VB300. To quantify the improvements, we have defined a suite of benchmark patterns to compare throughput “before and after”, which we plan to use throughout the entire program. These benchmark patterns show throughput improvements of up to a factor of 2.5 on the VB300. We believe this method of measuring throughput could be applied to other lithography systems that exhibit a throughput dependency on pattern type.

Citation Download Citation

John G. Hartley, Nigel Crosland, Robert C. Dowling Jr., Philip C. Hoyle, Andrew McClelland, Martin Turnidge, and James H. Smith II "Quantifying throughput improvements for electron-beam lithography using a suite of benchmark patterns", Proc. SPIE 8680, Alternative Lithographic Technologies V, 86800P (26 March 2013); https://doi.org/10.1117/12.2011664

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