Optimized shielded-gate trench MOSFET technology for high-frequency,
high-efficiency power supplies

Ashok Challa; Tirthajyoti Sarkar; Steven Sapp

doi:10.1117/12.923768

15 October 2012 Optimized shielded-gate trench MOSFET technology for high-frequency, high-efficiency power supplies

Ashok Challa, Tirthajyoti Sarkar, Steven Sapp

Proceedings Volume 8549, 16th International Workshop on Physics of Semiconductor Devices; 85490H (2012) https://doi.org/10.1117/12.923768
Event: 16th International Workshop on Physics of Semiconductor Devices, 2011, Kanpur, India

Abstract

Shielded-gate trench-MOSFETs yield superior performance compared to conventional gate trench devices by allowing higher doping density in the drift region and providing a ‘shielding effect’ for the gate by placing an intermediate electrode between gate and drain. However, further design optimizations can be done for a shieldedgate trench-MOSFET to improve performance parameters particularly suited for next-generation high-frequency computing power supply applications and they have been outlined in this article. Channel optimization, substrate thinning and intrinsic gate resistance reduction (by layout enhancements) have been discussed along with their impact on cost-performance benefit on the device. Further, effects of these design optimizations on the power loss and efficiency of a high-frequency switching converter have been demonstrated by mixed device–circuit simulations.

Citation Download Citation

Ashok Challa, Tirthajyoti Sarkar, and Steven Sapp "Optimized shielded-gate trench MOSFET technology for high-frequency, high-efficiency power supplies", Proc. SPIE 8549, 16th International Workshop on Physics of Semiconductor Devices, 85490H (15 October 2012); https://doi.org/10.1117/12.923768

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