Paper
3 March 2010 CD-uniformity for 45nm NV memory on product-stack
Umberto Iessi, Brian Colombo, Johannes Plauth, Benedetta Triulzi, Elio De Chiara, Paolo Canestrari
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Abstract
CD uniformity budget for a 45-nm NV memory device requires the analysis and compensation of each single contributor factor. A dedicated simulation tool "CDU Predictor" helps to quantify the impact of main scanner and process factors for a comprehensive study of the CD Uniformity for an ideal flat wafer. However this analysis could under estimate the real CD distribution on a real production wafer if artefacts induced by thin-film effects and underling device topography significantly increase the contribution of the optical leveling-device to the total focus-error and hence spread the CD distribution for processes with low DOF. Such artefacts can be eliminated by application of an offset-map obtained by probing the mechanical top-surface of the resist-stack with an AirGauge (AirGaugeImprovedLEvelling, AGILE). The systematic variation of CD across the wafer, no matter whether due to fingerprints of the reticle, the device-topography, the track-process or the exposure-tool, can be mapped into dose-corrections for compensation (DoseMapper). We discuss an experimental case with a combination of both tools for an effective CD Uniformity optimization.
© (2010) COPYRIGHT Society of Photo-Optical Instrumentation Engineers (SPIE). Downloading of the abstract is permitted for personal use only.
Umberto Iessi, Brian Colombo, Johannes Plauth, Benedetta Triulzi, Elio De Chiara, and Paolo Canestrari "CD-uniformity for 45nm NV memory on product-stack", Proc. SPIE 7640, Optical Microlithography XXIII, 76403I (3 March 2010); https://doi.org/10.1117/12.846538
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Cited by 2 scholarly publications.
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KEYWORDS
Semiconducting wafers

Critical dimension metrology

Reticles

Scanners

Thin films

193nm lithography

Lithography

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