A new method of accelerated graph display in primary flight display based on FPGA

Quancun Kong; Chenggui Li; Fengqing Zhang

doi:10.1117/12.717164

6 November 2006 A new method of accelerated graph display in primary flight display based on FPGA

Quancun Kong, Chenggui Li, Fengqing Zhang

Proceedings Volume 6357, Sixth International Symposium on Instrumentation and Control Technology: Signal Analysis, Measurement Theory, Photo-Electronic Technology, and Artificial Intelligence; 635732 (2006) https://doi.org/10.1117/12.717164
Event: Sixth International Symposium on Instrumentation and Control Technology, 2006, Beijing, China

Abstract

With the development of avionic technology, there is the increasing amount of information to be displayed on Primary Flight Display (PFD) of the cockpit. Beside the higher requirement of accuracy, reliability and the real-time property of information should be met in some emergency situations. Therefore, it is rather important to make further improvement on speeding up graph generation and display. This paper, based on hardware acceleration, describes a designated method to satisfy the higher requirement of PFD for graph display. The new method is characterized with graphic layering double frame buffer alternation and graphic synthesis, which to a great extent, reduces the job of a processor and speeds up the graphic generation and display, hence solving the speed bottleneck in PFD graphic display.

Citation Download Citation

Quancun Kong, Chenggui Li, and Fengqing Zhang "A new method of accelerated graph display in primary flight display based on FPGA", Proc. SPIE 6357, Sixth International Symposium on Instrumentation and Control Technology: Signal Analysis, Measurement Theory, Photo-Electronic Technology, and Artificial Intelligence, 635732 (6 November 2006); https://doi.org/10.1117/12.717164

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KEYWORDS

Digital signal processing

Field programmable gate arrays

Visualization

LCDs

Displays

Clocks

Data storage

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