The real-time target track process system design and the fast arithmetic research

Hua-Jun Song; Ming Zhu; Shuo Hu

doi:10.1117/12.567773

10 January 2005 The real-time target track process system design and the fast arithmetic research

Hua-Jun Song, Ming Zhu, Shuo Hu

Proceedings Volume 5623, Passive Components and Fiber-based Devices; (2005) https://doi.org/10.1117/12.567773
Event: Asia-Pacific Optical Communications, 2004, Beijing, China

Abstract

In order to resolve the contradiction between real-time and arithmetic complex in television tracking capture system, the paper discusses a real-time target track processing system which is constructed by high performance DSP chipset TMS320C6416 as core digital processor, huge reprogrammable logic chipset CPLD as system logic controller and field reprogrammable array FPGA as image preprocessing chipset to sampled video digital image. In the same time, the author also improved target capture arithmetic by introducing a kind of fast image correlation matching arithmetic based on evolutionary algorithms. Major parts put on hardware construct, working theory and new image correlation matching algorithms. Furthermore the comparison of the performance provided by this method with conventional matching algorithms is discussed. Theoretical analysis and simulation results show that the proposed algorithm is very effective.

Citation Download Citation

Hua-Jun Song, Ming Zhu, and Shuo Hu "The real-time target track process system design and the fast arithmetic research", Proc. SPIE 5623, Passive Components and Fiber-based Devices, (10 January 2005); https://doi.org/10.1117/12.567773

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