Tolerance-based process proximity correction (PPC) verification methodology

Kohji Hashimoto; Hiroharu Fujise; Shigeki Nojima; Takeshi Ito; Takahiro Ikeda

doi:10.1117/12.557795

20 August 2004 Tolerance-based process proximity correction (PPC) verification methodology

Kohji Hashimoto, Hiroharu Fujise, Shigeki Nojima, Takeshi Ito, Takahiro Ikeda

Proceedings Volume 5446, Photomask and Next-Generation Lithography Mask Technology XI; (2004) https://doi.org/10.1117/12.557795
Event: Photomask and Next Generation Lithography Mask Technology XI, 2004, Yokohama, Japan

Abstract

Tolerance-based process proximity correction (PPC) verification methodology is proposed for “hot spot management” in LSI fabrication process flow. This methodology verifies the PPC accuracy with the features of actual processed wafers/masks and target features in CAD data including CD tolerance around hot spots. The CD tolerance in CAD data is decided according to device characteristics, process integration, CD budget, and so on, and is used for the judgment criteria of the PPC accuracy. After the verifications, the actions in the manufacturing are decided. This methodology is demonstrated for the 65nm-node CMOS local metal at three representative hot spots extracted by lithography simulation, and the results yielded useful information for the manufacturing.

Citation Download Citation

Kohji Hashimoto, Hiroharu Fujise, Shigeki Nojima, Takeshi Ito, and Takahiro Ikeda "Tolerance-based process proximity correction (PPC) verification methodology", Proc. SPIE 5446, Photomask and Next-Generation Lithography Mask Technology XI, (20 August 2004); https://doi.org/10.1117/12.557795

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