ATM over SDH: design of a STM-16c transceiver using GaAs technology

Oscar Tubio; Roberto Esper-Chain; Francisco Gonzalez; Felix Tobajas; Valentin de Armas; Juan A. Montiel-Nelson; Roberto Sarmiento

doi:10.1117/12.449153

21 November 2001 ATM over SDH: design of a STM-16c transceiver using GaAs technology

Oscar Tubio, Roberto Esper-Chain, Francisco Gonzalez, Felix Tobajas, Valentin de Armas, Juan A. Montiel-Nelson, Roberto Sarmiento

Author Affiliations +

Proceedings Volume 4591, Electronics and Structures for MEMS II; (2001) https://doi.org/10.1117/12.449153
Event: International Symposium on Microelectronics and MEMS, 2001, Adelaide, Australia

Abstract

This paper describes an ATM transceiver implementation with add/drop function over SDH (Synchronous Digital Hierarchy) able to handle STM-16c (OC-48c) signals. The design has been developed using Vitesse HGaAs-IV technology using DCFL (Direct Coupled FET Logic) standard cells and obtaining, in this way, a logic gate level description which could be easily exportable to any technology.

Citation Download Citation

Oscar Tubio, Roberto Esper-Chain, Francisco Gonzalez, Felix Tobajas, Valentin de Armas, Juan A. Montiel-Nelson, and Roberto Sarmiento "ATM over SDH: design of a STM-16c transceiver using GaAs technology", Proc. SPIE 4591, Electronics and Structures for MEMS II, (21 November 2001); https://doi.org/10.1117/12.449153

ACCESS THE FULL ARTICLE

INSTITUTIONAL
Select your institution to access the SPIE Digital Library.

SELECT YOUR INSTITUTION

PERSONAL
Sign in with your SPIE account to access your personal subscriptions or to use specific features such as save to my library, sign up for alerts, save searches, etc.

PERSONAL SIGN IN

No SPIE Account? Create one

PURCHASE THIS CONTENT

SUBSCRIBE TO DIGITAL LIBRARY

50 downloads per 1-year subscription

Members: $195

Non-members: $335 ADD TO CART

25 downloads per 1 - year subscription

Members: $145

Non-members: $250 ADD TO CART

PURCHASE SINGLE ARTICLE

Includes PDF, HTML & Video, when available