Paper
18 September 2024 High-NA EUV single patterning of advanced metal logic nodes: inverse lithography techniques in combination with alternative mask absorbers
Author Affiliations +
Proceedings Volume 13273, 39th European Mask and Lithography Conference (EMLC 2024); 132731M (2024) https://doi.org/10.1117/12.3031718
Event: 39th European Mask and Lithography Conference (EMLC 2024), 2024, Grenoble, France
Abstract
The standard tantalum mask gives strong 3D electromagnetic effects, hence, its utilization in foundries to enable further downscaling to the A14 node might reach its limits even with the help of high NA EUV scanners (with 0.55 numerical aperture “NA”). The use of alternative mask absorber materials together with inverse lithography techniques (ILT), such as source mask optimization (SMO), can improve printing of metal logic layers with a target pitch of 20 and 24nm. This is possible due to thinner mask absorber thickness (around 40nm instead of 60nm for Ta-based mask) and due to different EUV optical properties of the mask material causing a different behavior of the light that is reflected by the masks. To better mitigate the light behavior during and after reflection from the mask, materials covering a good portion of the n-k graph (EUV refractive index, n, by EUV extinction coefficient, k) were chosen. The study proposes a comparison between baseline (Ta-based mask) and five new mask absorber candidates, ranging from three materials with lower refractive index and varied extinction coefficient (“low-n” with low-, mid-, and high-k), and two candidates with higher extinction coefficients (“highk” with mid- and high-n).
This paper contains simulation results with the Siemens EDA Calibre tool and demonstrates theoretical proof that alternative mask materials bring significant gain when compared to the tantalum-based mask absorber. Firstly, we optimized the source and aerial image intensity threshold on a set of predefined clips (with SMO techniques). Secondly, we applied ILT techniques to correct for the full chip mask based on a horizontal layout of a metal logic layer on imec’s roadmap. We then compare the tantalum-based mask with the alternative masks using imaging criteria, such as DoF (depth of focus), NILS (Normalized Image log slope), EPE (edge placement error), pattern shifts through focus, process variation band, source telecentricity errors, and MEEF (mask error enhancement factor) on a variety of features in the metal logic clip to maximize the overall process window.
(2024) Published by SPIE. Downloading of the abstract is permitted for personal use only.
Ana-Maria Armeanu, Nick Pellens, Vicky Philipsen, Evgeny Malankin, Dongbo Xu, Keisuke Mizuuchi, Gabriel Curvacho, Chih-I Wei, Neal Lafferty, and Germain Fenger "High-NA EUV single patterning of advanced metal logic nodes: inverse lithography techniques in combination with alternative mask absorbers", Proc. SPIE 13273, 39th European Mask and Lithography Conference (EMLC 2024), 132731M (18 September 2024); https://doi.org/10.1117/12.3031718
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KEYWORDS
Source mask optimization

Metals

Printing

Logic

Nanoimprint lithography

Lithography

3D mask effects

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