Research on chip thinning technology

Wei Wang; Ye Li; De Song; Xulei Qin

doi:10.1117/12.2565288

17 April 2020 Research on chip thinning technology

Wei Wang, Ye Li, De Song, Xulei Qin

Proceedings Volume 11455, Sixth Symposium on Novel Optoelectronic Detection Technology and Applications; 114556S (2020) https://doi.org/10.1117/12.2565288
Event: Sixth Symposium on Novel Photoelectronic Detection Technology and Application, 2019, Beijing, China

Abstract

With the demand for back-illuminated CMOS/CCD and electron bombardment imaging devices, the requirement for chip thickness has become the key to various imaging device fabrication techniques. In this paper, the back of semiconductor silicon wafer was thinned by means of mechanical grinding and wet etching. The thinned chip was tested by the step meter and atomic force microscope. The chip thinning technology realizes the thickness of 15 μm, which provides technical support for the preparation of backlight imaging devices or electron bombardment imaging devices.

Citation Download Citation

Wei Wang, Ye Li, De Song, and Xulei Qin "Research on chip thinning technology", Proc. SPIE 11455, Sixth Symposium on Novel Optoelectronic Detection Technology and Applications, 114556S (17 April 2020); https://doi.org/10.1117/12.2565288

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