SRAM-based in-memory-computing for AI edge devices

Weidong Xu; Mian Lou; Chengmin Xie; Li Li; Zhu Shi; Longqing Gong

doi:10.1117/12.2629125

7 March 2022 SRAM-based in-memory-computing for AI edge devices

Weidong Xu, Mian Lou, Chengmin Xie, Li Li, Zhu Shi, Longqing Gong

Proceedings Volume 12167, Third International Conference on Electronics and Communication; Network and Computer Technology (ECNCT 2021); 1216731 (2022) https://doi.org/10.1117/12.2629125
Event: 2021 Third International Conference on Electronics and Communication, Network and Computer Technology, 2021, Harbin, China

Abstract

With the development of artificial intelligence (AI), data intensive algorithms, like Deep Neural Networks (DNNs), need power-consumed less but faster edge processors. In-Memory-Computing (IMC) is a promising candidate to break through von Neumann bottleneck. SRAM-based IMC provides stable, fast and low-power arithmetic ability. This article reviews the background of SRAM-based IMC, and introduces the essential influence factors and trends from the perspective of device, circuit and architecture.

Citation Download Citation

Weidong Xu, Mian Lou, Chengmin Xie, Li Li, Zhu Shi, and Longqing Gong "SRAM-based in-memory-computing for AI edge devices", Proc. SPIE 12167, Third International Conference on Electronics and Communication; Network and Computer Technology (ECNCT 2021), 1216731 (7 March 2022); https://doi.org/10.1117/12.2629125

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